mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 456

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

PACTL/PACNT — Pulse Accumulator Control Register/Counter
OC1M[5:1] — OC1 Mask Field
OC1D[5:1] — OC1 Data Field
D.9.6 Timer Counter Register
TCNT — Timer Counter Register
D.9.7 Pulse Accumulator Control Register/Counter
PAIS — PAI Pin State (Read Only)
PAEN — Pulse Accumulator Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
D-78
MOTOROLA
PAIS
15
U
RESET:
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that
determines which pins are affected. OC1D determines what the outputs are.
OC1M[5:1] correspond to OC[5:1].
OC1D[5:1] correspond to OC[5:1].
TCNT is the 16-bit free-running counter associated with the input capture, output com-
pare, and pulse accumulator functions of the GPT module.
PACTL enables the pulse accumulator and selects either event counting or gated
mode. In event counting mode, PACNT is incremented each time an event occurs. In
gated mode, it is incremented by an internal clock.
The effects of PAMOD and PEDGE are shown in Table D-47.
PAEN
0 = Corresponding output compare pin is not affected by OC1 compare.
1 = Corresponding output compare pin is affected by OC1 compare.
0 = If OC1 mask bit is set, clear the corresponding output compare pin on
1 = If OC1 mask bit is set, the set corresponding output compare pin on
0 = Pulse accumulator disabled.
1 = Pulse accumulator enabled.
0 = External event counting.
1 = Gated time accumulation.
14
0
OC1 match.
OC1 match.
PAMOD PEDGE PCLKS
13
0
12
0
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
I4/O5
10
0
Go to: www.freescale.com
PACLK[1:0]
9
0
8
0
7
0
6
0
PULSE ACCUMULATOR COUNTER
5
0
4
0
3
0
MC68HC16Y3/916Y3
USER’S MANUAL
2
0
$YFF90C
$YFF90A
1
0
0
0