mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 493

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Pulse width modulation
PWM 13-17, 14-8
PWMA/B 13-8, D-84
PWMBUFA/B 13-20, D-84
PWMC 13-8, D-82
PWMCNT 13-19, D-84
QDEC 14-10
QILR 11-2, D-47
QIVR 11-2, D-47
QOM 14-11
QSM
MC68HC16Y3/916Y3
USER’S MANUAL
-width modulation 13-1
TPU waveform (PWM) 14-8
clock output enable (PPROUT) D-83
prescaler/PCLK select (PPR) field D-83
slow/fast select
address map 11-2, D-46
block diagram 11-1
general 11-1
interrupts 11-3
pin function 11-5, D-54
QSPI 11-5
reference manual 11-1
registers
clock
counter (PACNT) D-79
edge control (PEDGE) D-78
enable (PAEN) D-78
flag (PAIF) 13-16, D-82
input
mode (PAMOD) D-78
overflow
pins (PWMA/PWMB) 13-8
unit (PWM) 13-17
(SFA) bit D-83
(SFB) bit D-83
operating modes 11-10
operation 11-9
pins 11-9
RAM 11-8
registers 11-7
command RAM (CR) D-60
global registers 11-2
select (PACLK) D-79
select mux 13-10
(PAI) pin 13-8, 13-16
interrupt enable (PAII) bit D-81
flag (PAOVF) 13-16, D-82
interrupt enable (PAOVI) bit D-81
16.78 MHz frequency ranges 13-19
block diagram 13-18
buffer register (PWMBUFA/B) 13-20
counter 13-19
duty cycle ratios 13-18
frequency ranges D-84
function 13-19
interrupt
–Q–
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
QSMCR D-46
QSPI 11-1, 11-2, 11-5
QTEST 11-2, D-47
Quadrature decode (QDEC) 14-10
SCI 11-22
block diagram 11-6
command RAM 11-9
enable (SPE) D-56
finished flag (SPIF) D-59
initialization operation 11-11
loop mode (LOOPQ) D-58
master operation flow 11-12
operating modes 11-10
operation 11-9
peripheral chip-selects 11-22
pins 11-9
RAM 11-8
registers 11-7
timing A-23
module configuration register (QSMCR) D-46
pin control registers 11-4
QSPI
receive data RAM (RR) D-59
SCI
test register (QTEST) D-47
transmit data RAM (TR) D-59
types 11-2
operation 11-26
pins 11-26
registers 11-23
master mode 11-10, 11-17
slave mode 11-10, 11-21
receive RAM 11-8
transmit RAM 11-8
control registers 11-7
status register 11-7
— master, CPHA = 0/CPHA = 1 A-24
— slave, CPHA = 0/CPHA = 1 A-25
test register (QTEST) 11-2
port QS
control register 0 (SPCR0) D-54
control register 1 (SPCR1) D-56
control register 2 (SPCR2) D-57
control register 3 (SPCR3) D-58
status register (SPSR) D-58
control register 0 (SCCR0) D-48
control register 1 (SCCR1) D-49
data register (SCDR) D-52
status register (SCSR) D-51
wraparound mode 11-20
wraparound mode 11-22
level register (QILR) 11-2, D-47
vector register (QIVR) 11-2, D-47
data
data direction register (DDRQS) 11-4
data register (PORTQS) 11-4
pin assignment register (PQSPAR)
direction register (DDRQS) D-53
register (PORTQS) D-52
D-53
MOTOROLA
I-11