mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 101

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mc68hc05ct4fn

Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13.3 Comparator Control/Status Register
MC68HC05CT4
Rev. 2.0
Address:
CMP3 — Comparator 3 Output
CMP2 — Comparator 2 Output
CMP1 — Comparator 1 Output
Reset:
Read:
Write:
Figure 13-2. Comparator Control/Status Register (CMPCSR)
This bit is implemented in two ways: as a real-time comparator output
or as a latched interrupt source. The state of CM3IE determines which
implementation is selected.
CM3IE = 0 (nonlatched mode) — This status bit is cleared only by two
means:
CM3IE = 1 (latched mode) — This latched status bit is set when the
voltage at CMP3+ (PD0) is larger than that of CMP3– (internal voltage
reference ~ 2 V
This status bit is set when the voltage at CMP12+ is larger than that
of CMP2–, otherwise, it is cleared. Reset clears this bit because the
comparator is disabled.
This status bit is set when the voltage at CMP12+ is larger than that
of CMP1–, otherwise, it is cleared. Reset clears this bit because the
comparator is disabled.
Freescale Semiconductor, Inc.
1. Clearing CM3IE while the voltage at CMP3+ is less than CMP3–
2. By an external reset
For More Information On This Product,
$0022
CMP3
Bit 7
0
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= Unimplemented
CMP2
6
0
DD/
Comparators
3). An interrupt is then initiated ($1FFA–$1FFB).
CMP1
5
0
CM3IE
4
0
Comparator Control/Status Register
3
0
0
General Release Specification
CEN3
2
0
CEN2
1
0
Comparators
CEN1
Bit 0
0

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