mc68ec040v Freescale Semiconductor, Inc, mc68ec040v Datasheet - Page 184

• Manufacturer Part Number: mc68ec040v
• Description: M68040 User Manual
• Manufacturer: Freescale Semiconductor, Inc

On the initial cycle of a line transfer, a retry causes the processor to retry the bus cycle as
illustrated in Figure 7-29. However, the processor recognizes a retry signaled during the
second, third, or fourth cycle of a line as a bus error and causes the processor to abort the
line transfer. A burst-inhibited line transfer can only be retried on the initial transfer. A
burst-inhibited line transfer aborts if a retry is signaled for any of the three long-word
transfers used to complete the line transfer. Negating the bus grant (BG) signal on the
M68040 while asserting both TA and TEA provides a relinquish and retry operation for any
bus cycle that can be retried (see Figure 7-31).
7- 42
UPA1, UPA0
SIZ1, SIZ0
TM2–TM0
TT1, TT0
D31–D0
A31–A0
CIOUT
BCLK
R/W
TEA
TBI
TIP
TS
TA
Figure 7-29. Retry Operation on Line Write
Freescale Semiconductor, Inc.
C1
For More Information On This Product,
SIGNALED
RETRY
LINE
C2
M68040 USER’S MANUAL
Go to: www.freescale.com
C1
C2
RETRY CYCLE
C3
C4
C5
MOTOROLA