mc68ec040v Freescale Semiconductor, Inc, mc68ec040v Datasheet - Page 417

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mc68ec040v

Manufacturer Part Number
mc68ec040v
Description
M68040 User Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
C.7.5 Clock AC Timing Specifications
NOTES:
MOTOROLA
Num
5
6,7 1
8
8a 2
8b 2
9
1. Rising and falling edges of BCLK must be monotonic.
2. Specification value at maximum frequency of operation. BCLK must not exceed 16.67 MHz for low
BCLK
Frequency of Operation
BCLK Cycle Time
BCLK Rise and Fall Time
BCLK Duty Cycle Measured at 1.5 V
BCLK Pulse Width High Measured at 1.5 V
BCLK Pulse Width Low Measured at 1.5 V
BCLK edge to edge jitter
frequency operation
Characteristic
Figure C-12. Clock Input Timing Diagram
Freescale Semiconductor, Inc.
For More Information On This Product,
8A
Go to: www.freescale.com
M68040 USER’S MANUAL
5
PRELIMINARY
0 - 16.67 MHz
28.5
28.5
Min
60
45
0
VM
8B
(See Figure C-12)
16.67
Max
55
2
16.67
Min
40
18
18
45
25 MHz
6
Max
25
60
22
22
20
55
2
VIH
VIL
16.67
13.63
13.63
Min
30
45
33 MHz
16.66
16.66
Max
33
60
55
20
2
7
Unit
MHz
ns
ns
ns
ns
ps
%
C- 21

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