mpc8343e Freescale Semiconductor, Inc, mpc8343e Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/2/263/freescale_semiconductor__inc_sml.jpg)
mpc8343e
Manufacturer Part Number
mpc8343e
Description
Mpc8343e Powerquicc
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC8343E.pdf
(84 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
mpc8343eCVRADDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8343eCVRAGD
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8343eCVRAGDB
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
mpc8343eCVRAGDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8343eCVRAGDB400/266
Manufacturer:
FREESCAL
Quantity:
173
Company:
Part Number:
mpc8343eCZQADDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8343eCZQAGDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
mpc8343eVRAGDB
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
mpc8343eVRAGDB
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
•
•
•
— On-the-fly power management using CKE
— Registered DIMM support
— 2.5-V SSTL2 compatible I/O
Dual three-speed (10/100/1000) Ethernet controllers (TSECs)
— Dual controllers designed to comply with IEEE 802.3®, 802.3u®, 820.3x®, 802.3z®,
— Ethernet physical interfaces:
— Buffer descriptors are backward-compatible with MPC8260 and MPC860T 10/100
— 9.6-Kbyte jumbo frame support
— RMON statistics support
— Internal 2-Kbyte transmit and 2-Kbyte receive FIFOs per TSEC module
— MII management interface for control and status
— Programmable CRC generation and checking
— Designed to comply with PCI Specification Revision 2.2
— Data bus width:
— PCI 3.3-V compatible
— PCI host bridge capabilities
— PCI agent mode on PCI interface
— PCI-to-memory and memory-to-PCI streaming
— Memory prefetching of PCI read accesses and support for delayed read transactions
— Posting of processor-to-PCI and PCI-to-memory writes
— On-chip arbitration supporting five masters on PCI
— Accesses to all PCI address spaces
— Parity supported
— Selectable hardware-enforced coherency
— Address translation units for address mapping between host and peripheral
— Dual address cycle for target
— Internal configuration registers accessible from PCI
Security engine is optimized to handle all the algorithms associated with IPSec, SSL/TLS, SRTP,
IEEE Std. 802.11i®, iSCSI, and IKE processing. The security engine contains four
crypto-channels, a controller, and a set of crypto execution units (EUs):
— Public key execution unit (PKEU) :
PCI interface
MPC8343E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
802.3ac® standards
– 1000 Mbps IEEE Std. 802.3 RGMII, IEEE Std. 802.3z RTBI, full-duplex
– 10/100 Mbps IEEE Std. 802.3 MII full- and half-duplex
programming models
– 32-bit data PCI interface operating at up to 66 MHz
– RSA and Diffie-Hellman algorithms
Overview
3