mpc8379e Freescale Semiconductor, Inc, mpc8379e Datasheet - Page 44

• Manufacturer Part Number: mpc8379e
• Description: Powerquicc Ii Pro Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Enhanced Secure Digital Host Controller (eSDHC)
Due to the special implementation of the eSDHC, there are constraints regarding the clock and data signals
propagation delay on the user board. The constraints are for minimum and maximum delays, as well as
skew between the CLK and DAT/CMD signals.
In full speed mode, there is no need to add special delay on the data or clock signals. The user should make
sure to meet the timing requirements as described further within this document.
If the system is designed to support both high-speed and full-speed cards, the high-speed constraints
should be fulfilled. If the systems is designed to operate up to 25 MHz only, full-speed mode is
recommended.
11.1
Table 41
11.2
This section describes the AC electrical specifications for the eSDHC (SD/MMC) interface of the device.
Table 42
Figure
44
At recommended operating conditions OV
Input high voltage
Input low voltage
Input current
Output high voltage
Output low voltage
SD_CLK clock frequency—full speed mode
SD_CLK clock cycle
SD_CLK clock frequency—identification mode
SD_CLK clock low time
SD_CLK clock high time
SD_CLK clock rise and fall times
Input setup times: SD_CMD, SD_DATx, SD_CD to
SD_CLK
28.
provides the DC electrical characteristics for the eSDHC (SD/MMC) interface of the device.
provides the eSDHC AC timing specifications for full-speed mode as defined in
eSDHC DC Electrical Characteristics
eSDHC AC Timing Specifications (Full-Speed Mode)
Parameter
Parameter
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
Table 42. eSDHC AC Timing Specifications for Full-Speed Mode
Table 41. eSDHC interface DC Electrical Characteristics
DD
Symbol
= 3.3 V ± 165 mV.
V
V
V
V
I
IN
OH
OL
IH
IL
I
I
OH
at OV
at OV
OL
Condition
= –100 uA,
= +100 uA,
Symbol
t
—
—
—
DD
DD
t
t
t
t
SFSCKR
SFSIVKH
t
SFSCKH
f
SFSCKF
SFSCKL
f
SFSCK
SFSCK
SIDCK
(min)
(min)
/
1
0.625 × OV
0.75 × OV
Min
40
15
15
—
0
0
5
–0.3
Min
—
—
DD
DD
Max
400
25
—
—
—
—
5
0.125 × OV
0.25 × OV
OV
Freescale Semiconductor
DD
Max
±30
—
+ 0.3
MHz
Unit
KHz
ns
ns
ns
ns
ns
Figure 27
DD
DD
Notes
Unit
—
—
—
μA
2
2
2
2
V
V
V
V
and