mpc8306 Freescale Semiconductor, Inc, mpc8306 Datasheet - Page 27

• Manufacturer Part Number: mpc8306
• Description: Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

The following figure shows the MII management AC timing diagram.
Freescale Semiconductor
At recommended operating conditions with OV
MDC to MDIO delay
MDIO to MDC setup time
MDIO to MDC hold time
MDC rise time
MDC fall time
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
management data timing (MD) for the time t
hold time. Also, t
valid state (V) relative to the t
latter convention is used with the appropriate letter: R (rise) or F (fall).
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
Parameter/Condition
(first two letters of functional block)(reference)(state)(signal)(state)
MDDVKH
(Output)
(Input)
MDIO
MDIO
MDC
Table 25. MII Management AC Timing Specifications (continued)
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the
Figure 17. MII Management Interface Timing Diagram
MDC
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the
t
MDCH
DD
t
MDDVKH
is 3.3 V ± 300mV.
MDC
t
MDC
t
Symbol
MDKHDX
t
t
t
MDKHDX
MDDVKH
MDDXKH
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data
t
t
MDCR
MDHF
1
t
MDCF
Min
8.5
(first two letters of functional block)(signal)(state)(reference)(state)
10
—
—
0
for outputs. For example, t
t
MDDXKH
t
MDCR
Typical
—
—
—
—
—
MDKHDX
Max
70
10
10
—
—
Ethernet and MII Management
symbolizes
Unit
ns
ns
ns
ns
ns
Note
—
—
—
—
—
for
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