lan83c175 Standard Microsystems Corp., lan83c175 Datasheet - Page 18

• Manufacturer Part Number: lan83c175
• Description: Ethernet Cardbus Integrated Controller With Modem Support Corporation
• Manufacturer: Standard Microsystems Corp.

DWORD 0 - Status
Bit Number and Description
31 through 16 - RECEIVE FRAME LENGTH:
Number of bytes in the received frame.
15 - OWNER: Descriptor ownership bit - set to
“0” when the host owns the descriptor, set to
“1” when the NIC owns the descriptor.
14 - HEADER COPIED: Set when the receive
status is posted after a header copy.
13 - FRAGMENT LIST ERROR: Set when all
buffers in the fragment list have been filled
before the entire receive frame is copied.
12 - NETWORK STATUS VALID: Set when
bits 6 - 0 contain the status from the current
frame and bits 31-16 contain the frame length.
error,
frame may or may not be posted. In all other
cases this bit will be set.
11 through 7 - Reserved
6 - RECEIVER DISABLED: This bit is set
when the receiver is in monitor mode. Always
returns 0.
5 - BROADCAST ADDRESS RECOGNIZED:
This bit is set when a broadcast address has
been recognized.
4 - MULTICAST ADDRESS RECOGNIZED:
This bit is set when a multicast address which
3 - MISSED PACKET: This bit is set when a
packet with a recognized address and without
errors (or with masked errors) is not buffered
because the device is in monitor mode. This
bit is also set when the packet overflows the
receive buffer space and cannot be received.
Always returns 0.
In the case of a header copy or fragment list
passes the hash filter has been recognized.
the receive status from the current
18
2 - CRC ERROR: This bit is set when a frame's
computed CRC does not match the CRC
appended to the frame. If the frame is a runt, this
bit will be clear. In MII mode, this bit will also be
set if receive error was asserted on the MII
interface during reception of the frame.
1 - FRAME ALIGNMENT ERROR: This bit is set
if a CRC error has occurred and the frame is not
byte aligned.
0 - PACKET RECEIVED INTACT: This bit is set
when a packet is received into the buffer space
without error.
DWORD 1 - Data Buffer/Start of Fraglist
Pointer
Bit Number and Description
31 through 0 - Starting address of data buffer or
fragment list in host memory space. Fragment
list must be DWORD aligned. Data buffer may
be aligned on any byte.
DWORD 2 - Control/Data Length (or Frame
Offset)
Bit Number and Description
31 through 19 - Reserved: Must always be set to
0.
18 - HEADER: Indicates that this descriptor is for
a header copy.
17 - LFFORM: Fragment list format - a 1 indicates
that the data length
pointer in the fragment list. A 0 indicates that the
pointer comes before the data length.
16 - FRAGLIST: Indicates that this descriptor
points to a fragment list.
15 through 0 - Length of data buffer (when
FRAGLIST = 0) or Offset into frame where copy
begins (when FRAGLIST = 1).
field comes
before the