lan9215i Standard Microsystems Corp., lan9215i Datasheet - Page 76
lan9215i
Manufacturer Part Number
lan9215i
Description
Lan9215i 16-bit Non-pci 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9215I.pdf
(138 pages)
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Revision 2.3 (08-06-08)
12:11
BITS
2-0
10
9
8
7
6
5
4
3
Reserved
TX Data FIFO Overrun Interrupt (TDFO). Generated when the TX data
FIFO is full, and another write is attempted.
TX Data FIFO Available Interrupt (TDFA). Generated when the TX data
FIFO available space is greater than the programmed level.
TX Status FIFO Full Interrupt (TSFF). Generated when the TX Status
FIFO is full.
TX Status FIFO Level Interrupt (TSFL). Generated when the TX Status
FIFO reaches the programmed level.
RX Dropped Frame Interrupt (RXDF_INT). This interrupt is issued
whenever a receive frame is dropped.
Reserved
RX Status FIFO Full Interrupt (RSFF). Generated when the RX Status
FIFO is full.
RX Status FIFO Level Interrupt (RSFL). Generated when the RX Status
FIFO reaches the programmed level.
GPIO [2:0] (GPIOx_INT). Interrupts are generated from the GPIO’s.
These interrupts are configured through the GPIO_CFG register.
DESCRIPTION
DATASHEET
16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
76
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
R/WC
TYPE
RO
RO
SMSC LAN9215i
DEFAULT
Datasheet
000
0
0
0
0
0
0
0
-
-
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