lan9215i Standard Microsystems Corp., lan9215i Datasheet - Page 97
lan9215i
Manufacturer Part Number
lan9215i
Description
Lan9215i 16-bit Non-pci 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9215I.pdf
(138 pages)
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16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9215i
5.3.24
BITS
BITS
31-8
7-0
7:0
9
8
EPC Time-out.
response from the EEPROM within 30mS, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
Note:
MAC Address Loaded.
was found, and that the MAC address programming has completed
normally. This bit is set after a successful load of the MAC address after
power-up, or after a RELOAD command has completed
EPC Address.
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
Reserved
EEPROM Data. Value read from or written to the EEPROM.
E2P_DATA – EEPROM Data Register
This register is used in conjunction with the E2P_CMD register to perform read and write operations
with the Serial EEPROM.
Offset:
If the EEDIO signal pin is externally pulled-high, EPC commands
will not time out if the EEPROM device is missing. In this case the
EPC Busy bit will be cleared as soon as the command sequence
is complete. It should also be noted that the ERASE, ERAL,
WRITE and WRAL commands are the only EPC commands that
will time-out if an EEPROM device is not present -and- the EEDIO
signal is pulled low
The 8-bit value in this field is used by the EEPROM
If an EEPROM operation is performed, and there is no
When set, this bit indicates that a valid EEPROM
DESCRIPTION
DESCRIPTION
B4h
DATASHEET
97
Size:
32 bits
R/WC
TYPE
TYPE
R/W
R/W
RO
RO
Revision 2.3 (08-06-08)
DEFAULT
DEFAULT
00h
00h
0
-
-
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