peb20550 Infineon Technologies Corporation, peb20550 Datasheet - Page 132

• Manufacturer Part Number: peb20550
• Description: Extended Pcm Interface Controller
• Manufacturer: Infineon Technologies Corporation

Memory Access Data Register
MADR
The Memory Access Data Register MADR contains the data to be transferred from or to
a memory location. The meaning and the structure of this data depends on the kind of
memory being accessed. If, for example, MADR contains a pointer to a PCM time slot,
the data must be encoded according to figure 48. If it contains a 4 bit C/I code the
structure would for example be “11 C/I 11”. For accesses to 4 bit code fields only the 4
least significant bits of MADR are relevant.
Memory Access Address Register
MAAR
The Memory Access Address Register MAAR specifies the address of the memory
access. This address encodes a CFI time slot for control memory and a PCM time slot
for data memory accesses. Bit 7 of MAAR (U/D bit) selects between upstream and
downstream memory blocks.
Bits MA6 … 0 encode the CFI or PCM port and time slot number according to figure 48.
Memory Access Control Register
MACR
The Memory Access Control Register MACR selects the type of memory (control or data
memory), the type of field (data or code field) and the access mode (read or write) of the
register access. When writing to the control memory code field, MACR also contains the
4 bit code (CMC3 … 0) defining the function of the addressed CFI time slot.
Semiconductor Group
bit 7
bit 7
bit 7
RWS
MD7
U/D
MOC3
MD6
MA6
MOC2
MD5
MA5
MOC1
read/write
read/write
read/write
MD4
MA4
132
MOC3/
CMC3
MD3
MA3
reset value:
reset value:
reset value:
CMC2
MD2
MA2
Application Hints
CMC1
MD1
MA1
undefined
undefined
undefined
PEB 2055
PEF 2055
bit 0
bit 0
bit 0
CMC0
MD0
MA0