peb20550 Infineon Technologies Corporation, peb20550 Datasheet - Page 84

• Manufacturer Part Number: peb20550
• Description: Extended Pcm Interface Controller
• Manufacturer: Infineon Technologies Corporation

rate. Frames are delimited by an 8 kHz frame synchronization signal (FSC). The bit
timing and FSC position is identical to the non-multiplexed IOM-1 case.
The line card version of the IOM
transceivers (ISDN) or codecs (analog), and the line card controller, the EPIC. The line
card controller provides the connection to the switch backbone. The IOM-2 bus
time-multiplexes data, control, and status information for up to 8 ISDN transceivers or up
to 16 codec/filters over a single full-duplex interface.
Figure 22 shows the IOM-2 frame structure for the line card. It consists of 8 individual
and independent IOM channels, each having a structure similar to the IOM-1 channel
structure. The main difference compared to IOM-1 is the more powerful monitor channel
performance. Monitor messages of unlimited length can now be transferred at a variable
speed, controlled by a handshake procedure using the MR and MX bits. The C/I channel
can have a width of 4 bits for ISDN applications or of 6 bits for analog signaling
applications.
Figure 22
IOM
Semiconductor Group
®
-2 Frame Structure for Line Card Applications
(4096 kHz)
(2048 kbit/s)
(2048 kbit/s)
Time-Slot
Number
FSC
(8 kHz)
DCL
DD#
DU#
SIG : Signaling Channel
B1 : 64 kbit/s Channel
B2 : 64 kbit/s Channel
D : 16 kbit/s Channel
C/I : Command/Indication Channel
MR : Monitor Handshake Bit "Receive"
MX : Monitor Handshake Bit "Transmit"
IOM Ch. 0
IOM Ch. 0
0 1 2 3 4 5 6 7 8
R
R
B1 Channel
8 Bits
IOM Ch. 1
IOM Ch. 1
R
R
IOM Ch. 2
IOM Ch. 2
R
R
B2 Channel
®
-2 provides a connection path between line
8 Bits
84
IOM Ch. 3 IOM Ch. 4 IOM Ch. 5 IOM Ch. 6 IOM Ch. 7
IOM Ch. 3
R
R
IOM Ch. 4
Monitor Channel
R
R
8 Bits
IOM Ch. 5
ISDN:
Analog:
R
R
IOM Ch. 6
D
Application Hints
Control Channel
R
R
SIG
8 Bits
C/I
IOM Ch. 7
PEB 2055
PEF 2055
R
R
ITD08037
M
R X
M M
R
31
M
X