peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 277
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peb2256
Manufacturer Part Number
peb2256
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB2256.pdf
(490 pages)
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Global Clock Mode Register 1 (Read/Write)
Value after reset: 00
GCM1
PHD_E1(7:0)
Global Clock Mode Register 2 (Read/Write)
Value after reset: 00
GCM2
PHD_E1(8:11)
VFREQ_EN
DVM_E1(0:2)
Data Sheet
DVM_E1
PHD_E1
7
7
7
2
DVM_E1
PHD_E1
Frequency Adjust for E1
Frequency Adjust for E1
Variable Frequency Enable
0 =
1 =
Divider Mode for E1
000 = Not valid
001 = Divide by DIV_E1 = 3
010 = Divide by DIV_E1 = 4 1/6
011 = Divide by DIV_E1 = 4
100 = Divide by DIV_E1 = 5.5
101 = Divide by DIV_E1 = 5 1/3
110 = Divide by DIV_E1 = 5 2/3
111 = Not valid
For details see calculation formulas below.
For details see calculation formulas below.
H
H
6
1
Fixed clock frequency of 2.048 (E1) or 1.544 MHz (T1/J1)
Variable master clock frequency
DVM_E1
PHD_E1
5
0
VFREQ_
PHD_E1
EN
4
277
PHD_E1
PHD_E1
11
3
PHD_E1
PHD_E1
10
2
PHD_E1
PHD_E1
1
9
PHD_E1
PHD_E1
FALC56 V1.2
E1 Registers
0
0
0
8
PEB 2256
2002-08-27
(93)
(92)
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