sab82526n Infineon Technologies Corporation, sab82526n Datasheet - Page 41

• Manufacturer Part Number: sab82526n
• Description: High-level Serial Data Communications Ics
• Manufacturer: Infineon Technologies Corporation

Table 2
Receive Interrupts
RECEIVE INTERRUPTS
RPF
RME
RFO
RFS
Semiconductor Group
Receive Pool Full
(ISTA)
Receive Message End
(ISTA)
Receive Frame Overflow
(EXIR)
Receive Frame Start
(EXIR)
41
*Only activated in Interrupt Mode!
Activated as soon as 32-bytes are stored in
the RFIFO but the message is not yet
completed.
Interrupt Mode:
Activated if either one message up to 32 bytes
or the last part of a message with more than
32 bytes is stored in the RFIFO, i.e. after the
reception of the CRC and closing flag
sequence.
DMA Mode:
Activated after the complete message has
been read out by the DMA controller.
Activated if a complete frame could not be
stored due to occupied RFIFO, i.e. the RFIFO
is full and the HSCX has detected the start of
a new frame.
*Only activated if enabled by setting the RIE
bit in CCR2 register.
Activated after the start of a valid frame has
been detected, i.e. after a valid address check
in
recognition, otherwise after the opening flag
(transparent mode 0), delayed by two bytes.
After an RFS interrupt, the contents of
– RHCR
– RAL1
– RSTA – bit 3-0
are valid and can be read by the CPU.
operation
modes
providing
SAB 82525
SAB 82526
SAF 82525
SAF 82526
address