sab-c161ji-lf Infineon Technologies Corporation, sab-c161ji-lf Datasheet - Page 5

• Manufacturer Part Number: sab-c161ji-lf
• Description: 16-bit Single-chip Microcontroller
• Manufacturer: Infineon Technologies Corporation

16-Bit Single-Chip Microcontroller
C166 Family
C161CS/JC/JI
• High Performance 16-bit CPU with 4-Stage Pipeline
• 16-Priority-Level Interrupt System with 59 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
• Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
• On-Chip Memory Modules
• On-Chip Peripheral Modules
• Up to 16 MBytes External Address Space for Code and Data
Data Sheet
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
Peripheral Event Controller (PEC)
via prescaler or via direct clock input
– Additional 32 kHz Oscillator
– 2 KBytes On-Chip Internal RAM (IRAM)
– 8 KBytes On-Chip Extension RAM (XRAM)
– 256 KBytes On-Chip Mask ROM
– 12-Channel 10-bit A/D Converter with Programmable Conversion Time
– Two 16-Channel Capture/Compare Units (eight IO lines each)
– Two Multi-Functional General Purpose Timer Units with 5 Timers
– Two Asynchronous/Synchronous Serial Channels
– High-Speed Synchronous Serial Channel (SPI)
– On-Chip CAN Interface (Rev. 2.0B active, Full CAN / Basic CAN)
– Serial Data Link Module (SDLM), compliant with J1850,
– IIC Bus Interface (10-bit Addressing, 400 kHz) with 2 Channels (multiplexed)
– On-Chip Real Time Clock
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
– Five Programmable Chip-Select Signals
– Hold- and Hold-Acknowledge Bus Arbitration Support
down to 7.8 s
with 15 Message Objects (C161CS 2x, C161JC 1x)
supporting Class 2 (C161JC/JI)
Data Bus Width
16 bit), 800 ns Division (32 / 16 bit)
1
C161CS/JC/JI
V3.0, 2001-01