sab-c161ji-lf Infineon Technologies Corporation, sab-c161ji-lf Datasheet - Page 71
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sab-c161ji-lf
Manufacturer Part Number
sab-c161ji-lf
Description
16-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAB-C161JI-LF.pdf
(89 pages)
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Part Number:
sab-c161ji-lf CA
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Multiplexed Bus (cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
ALE fall. edge to RdCS,
WrCS (no RW delay)
Address float after RdCS,
WrCS (with RW delay)
Address float after RdCS,
WrCS (no RW delay)
RdCS to Valid Data In
(with RW delay)
RdCS to Valid Data In
(no RW delay)
RdCS, WrCS Low Time
(with RW delay)
RdCS, WrCS Low Time
(no RW delay)
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
Address hold after
RdCS, WrCS
Data hold after WrCS
1)
Data Sheet
These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
specified together with the address and signal BHE (see figures below).
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
A
43
44
45
46
47
48
49
50
51
52
54
56
+
t
CC -4 +
CC –
CC –
CC 30 +
CC 50 +
CC 26 +
CC 20 +
CC 20 +
SR –
SR –
SR 0
SR –
C
+
t
F
min.
Max. CPU Clock
(120 ns at 25 MHz CPU clock without waitstates)
= 25 MHz
t
t
t
t
t
t
67
A
C
C
C
F
F
max.
–
0
20
16 +
36 +
–
–
–
–
20 +
–
–
t
t
t
C
C
F
1 / 2TCL = 1 to 25 MHz
min.
-4
+
–
–
–
–
2TCL - 10
+
3TCL - 10
+
2TCL - 14
+
0
–
2TCL - 20
+
2TCL - 20
+
Variable CPU Clock
t
t
t
t
t
t
A
C
C
C
F
F
C161CS/JC/JI-32R
C161CS/JC/JI-L
max.
2TCL - 24
3TCL - 24
2TCL - 20
–
0
TCL
+
+
–
–
–
–
+
–
–
t
t
t
C
C
F
V3.0, 2001-01
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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