cyv15g0404dxb Cypress Semiconductor Corporation., cyv15g0404dxb Datasheet - Page 6

• Manufacturer Part Number: cyv15g0404dxb
• Description: Independent Clock Quad Hotlink Ii Transceiver With Reclocker
• Manufacturer: Cypress Semiconductor Corporation.

Pin Configuration (Top View)
Document #: 38-02097 Rev. *B
W
G
M
A
B
C
D
E
F
H
K
N
P
R
T
U
V
Y
J
L
CTC[1]
STC[2]
TCLK
DC[6]
DC[7]
GND
DC[2]
DC[3]
DC[4]
GND
DC[1]
DD[0]
DD[3]
DD[5]
DD[6]
V
V
C1+
C1–
TDI
RX
TX
TX
RX
RX
RX
RX
RX
TX
TX
TX
TX
IN
IN
1
CC
CC
CLKOC
CLKC–
CLKC+
WREN
GND
GND
CLKD
DC[7]
DC[5]
DC[5]
DC[0]
DD[1]
DD[4]
DD[7]
OUT
OUT
TMS
V
REF
REF
V
C1–
C1+
RX
RX
RX
TX
TX
TX
TX
TX
TX
2
CC
CC
INSELC INSELB
INSELD INSELA
CTC[0]
STC[0]
CLKC+
CTD[0]
DC[0]
DC[4]
GND
DC[2]
RCLK
GND
DD[2]
DD[7]
V
LFIC
ENC
V
LFID
C2–
C2+
TX
TX
TX
TX
RX
RX
TX
TX
RX
IN
IN
3
CC
CC
CLKC–
CLKD–
CLKD+
STC[1]
CTD[1]
ERRC
RCLK
GND
CLKC
GND
DC[1]
DC[3]
DC[6]
DD[6]
OUT
OUT
V
END
V
C2–
C2+
RX
RX
RX
RX
RX
TX
TX
TX
TX
TX
TX
4
CC
CC
V
V
V
V
V
V
V
V
5
CC
CC
CC
CC
CC
CC
CC
CC
ULCD
ULCA
DD[2]
DD[3]
DD[4]
DD[5]
D1–
D1+
RX
RX
RX
RX
6
IN
IN
STD[0]
STD[1]
ULCC
SELC
DD[1]
DD[0]
OUT
OUT
SPD
D1–
D1+
RX
RX
RX
RX
7
GND
GND
GND
GND
GND
GND
GND
GND
8
CLKOD
STD[2]
CTA[1]
ADDR
DATA
DATA
D2–
D2+
RX
[7]
[6]
TX
[3]
TX
IN
IN
9
ADDR
ADDR
ADDR
DATA
DATA
NC
OUT
OUT
D2+
10
D2–
[5]
[4]
[0]
[2]
[1]
[1]
CLKD–
CLKD+
CLKA+
CLKA
DATA
DATA
REF
REF
A1–
A1+
11
RX
[3]
[2]
TX
IN
IN
CLKOA
CLKA–
ERRA
DATA
DATA
DA[1]
OUT
OUT
12
A1–
A1+
RX
TX
TX
TX
[1]
[0]
GND
GND
GND
GND
GND
GND
GND
GND
13
LPENB ULCB
RCLK
DA[4]
DA[3]
DA[2]
DA[0]
ENB
A2+
14
A2–
TX
TX
TX
TX
IN
IN
CTA[0]
SELD
DA[7]
DA[6]
DA[5]
OUT
OUT
SPD
15
A2–
A2+
TX
TX
TX
TX
V
V
V
V
V
V
V
V
16
CC
CC
CC
CC
CC
CC
CC
CC
CYV15G0404DXB
LPENA
CLKB+
STB[2]
ERRD
LDTD
RCLK
SELB
GND
GND
DB[3]
DB[6]
DB[5]
DB[1]
DA[2]
DA[7]
V
V
LFIA
ENA
SPD
REF
17
B1–
B1+
EN
RX
RX
RX
TX
TX
RX
RX
TX
IN
IN
CC
CC
STB[1]
CLKB+
CLKB–
CTB[0]
CLKA+
CLKA–
TRST LPEND
GND
DB[0]
DB[4]
GND
DB[4]
DB[0]
DA[3]
OUT
OUT
VCC
V
ENC
REF
V
REF
REF
B1–
B1+
18
RX
RX
RX
RX
RX
LP
TX
TX
TX
CC
CC
CLKOB
CLKB–
CTB[1]
STA[2]
SCAN
ERRB
SELA
GND
DB[5]
DB[7]
GND
DB[3]
DA[0]
DA[4]
DA[6]
V
SPD
V
EN2
19
B2–
B2+
TX
RX
RX
RX
TX
TX
TX
RX
RX
RX
RX
IN
IN
CC
CC
Page 6 of 44
TMEN3
STB[0]
STA[1]
STA[0]
GND
CLKB
GND
DB[1]
DB[2]
DB[6]
DB[2]
DB[7]
DA[1]
DA[5]
OUT
OUT
TDO
V
LFIB
V
B2–
B2+
20
RX
RX
RX
RX
RX
RX
RX
TX
TX
TX
TX
CC
CC
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