ata6603 ATMEL Corporation, ata6603 Datasheet - Page 343
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ata6603
Manufacturer Part Number
ata6603
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6603.pdf
(360 pages)
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5.4
4921D–AUTO–08/07
Note:
Address
(0xDF)
(0xDE)
(0xDD)
(0xDC)
(0xDB)
(0xDA)
(0xCF)
(0xCE)
(0xCD)
(0xCC)
(0xCB)
(0xCA)
(0xD9)
(0xD8)
(0xD7)
(0xD6)
(0xD5)
(0xD4)
(0xD3)
(0xD2)
(0xD1)
(0xD0)
(0xC9)
(0xC8)
(0xC7)
(0xC6)
(0xC5)
(0xC4)
(0xC3)
(0xC2)
(0xC1)
(0xC0)
Register Summary (Continued)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATA6602/ATA6603
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATA6602/ATA6603 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
UBRR0H
UCSR0C
UBRR0L
UCSR0B
UCSR0A
Name
UDR0
UMSEL01
RXCIE0
RXC0
Bit 7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
UMSEL00
TXCIE0
TXC0
Bit 6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
UDRIE0
UPM01
UDRE0
Bit 5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
USART Baud Rate Register Low
USART I/O Data Register
UPM00
RXEN0
Bit 4
FE0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
USBS0
TXEN0
DOR0
Bit 3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
USART Baud Rate Register High
/UDORD0
UCSZ01
UCSZ02
UPE0
Bit 2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ATA6602/ATA6603
UCSZ00 /
UCPHA0
RXB80
U2X0
Bit 1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
UCPOL0
MPCM0
TXB80
Bit 0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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215
212
211
343
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