pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 108

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pxb4340e

Manufacturer Part Number
pxb4340e
Description
Atm Oam Processor Aop
Manufacturer
Infineon Technologies Corporation
Datasheet

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Data Sheet
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PAISMEN
0
1
PCCMEN
0
1
PARIEN
0
1
PLOCFAI
1
PLOCDEF
1
PRDIFAI
1
PRDIDEF
1
PAISFAI
1
PAISDEF
1
F4 AIS monitoring disabled.
F4 AIS monitoring enabled.
State transition to AIS-failure state and out of AIS-failure
state is reported by use of the µP interrupt UPSTTR.
F4 CC monitoring disabled.
F4 CC monitoring enabled.
State transition to LOC failure state and out of LOC failure
state is reported by use of the µP interrupt UPSTTR.
F4 AIS/RDI Cell insertion disabled.
F4 AIS/RDI Cell insertion enabled.
Independent of the reason for cell generation (forced
insertion by ARINS, physical error by µP register
PHYERR, detected LOC or AIS state) AIS/RDI cell
generation is always enabled with this flag. Used e.g. to
suppress RDI at endpoints of multicast connections.
F4 LOC failure state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
F4 LOC defect state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
F4 RDI failure state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
F4 RDI defect state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
F4 AIS failure state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
F4 AIS defect state indication. Initialize to 0 at connection
setup. Do not change by µP in normal operation.
3-108
04.2000

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