w83627ef Winbond Electronics Corp America, w83627ef Datasheet - Page 100

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w83627ef

Manufacturer Part Number
w83627ef
Description
Lpc Super I/o For Desktop & Server
Manufacturer
Winbond Electronics Corp America
Datasheet
CR 26h. (Global Option; Default 0s000000b)
BIT
7
6
5
4
3
2
1
0
Reserved.
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
R / W
SEL4FDD =>
= 0
= 1
HEFRAS =>
= 0
= 1
The corresponding power-on strapping pin is RTSA# (pin 51).
LOCKREG =>
= 0
= 1
DSFDLGRQ =>
= 0
register (base address + 2) bit 3 is effective on selecting IRQ.
= 1
register (base address + 2) bit 3 is not effective on selecting IRQ.
DSPRLGRQ =>
= 0
register (base address + 2) bit 4 is effective on selecting IRQ.
= 1
register (base address + 2) bit 4 is not effective on selecting IRQ.
DSUALGRQ =>
= 0
(base
= 1
register (base address + 4) bit 3 is not effective on selecting IRQ.
DSUBLGRQ =>
= 0
(base
= 1
register (base address + 4) bit 3 is not effective on selecting IRQ.
Select two FDD mode.
Select four FDD mode.
Write 87h to location 2E twice.
Write 87h to location 4E twice.
Enable R/W configuration registers.
Disable R/W configuration registers.
Enable FDC legacy mode on IRQ and DRQ selection, then DO
Disable FDC legacy mode on IRQ and DRQ selection, then DO
Enable PRT legacy mode on IRQ and DRQ selection, then DCR
Disable PRT legacy mode on IRQ and DRQ selection, then DCR
Enable UART A legacy mode on IRQ selection, then HCR register
address + 4) bit 3 is effective on selecting IRQ.
Disable UART A legacy mode on IRQ selection, then HCR
Enable UART B legacy mode on IRQ selection, then HCR register
address + 4) bit 3 is effective on selecting IRQ.
Disable UART B legacy mode on IRQ selection, then HCR
W83627EHF/EF, W83627EHG/EG
- 94 -
s: value by strapping
DESCRIPTION

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