w83627ef Winbond Electronics Corp America, w83627ef Datasheet - Page 96

• Manufacturer Part Number: w83627ef
• Description: Lpc Super I/o For Desktop & Server
• Manufacturer: Winbond Electronics Corp America

Bit 7: Smart Fan of CPUFANIN0 warning status. Read 1, the CPUTIN temperature has been over the
Bit 6: Smart Fan of SYSFANIN warning status. Read 1, the SYSTIN temperature has been over the
Bit 5: AUXTIN temperature sensor status. Read 1, the temperature exceeds the over-temperature limit
Bit 4: Case Open status. Read 1, the case open is detected and latched. Read 0, the case is not
Bit 3: AUXFANIN0 status. Read 1, the fan speed count is over the limit value. Read 0, the fan speed
Bit 2: CPUFANIN1 status. Read 1, the fan speed count is over the limit value. Read 0, the fan speed
Bit 1: Smart Fan of CPUFANIN1 warning status. Read 1, the select temperature has been over the
Bit 0: VIN1 Voltage status. Read 1, the voltage of VIN1 is over/under the limit value. Read 0, the
6.8.91 Real Time Hardware Status Register III - Index 5Bh (Bank 4)
Register Location:
Power on Default Value:
Attribute:
Size:
Bit 7: AUXFANIN1 status. Read 1, the fan speed count is over the limit value. Read 0, the fan speed
target temperature for 3 minutes with full fan speed at thermal cruise mode of SmartFan
Read 0, the temperature does not reach the warning range yet.
target temperature for 3 minutes with full fan speed at thermal cruise mode of SmartFan
Read 0, the temperature does not reach the warning range yet.
value. Read 0, the temperature is in under the hysteresis value.
latched open.
count is in the limit range.
count is in the limit range.
target temperature for 3 minutes with full fan speed at thermal cruise mode of SmartFan
Read 0, the temperature does not reach the warning range yet.
voltage of VIN1 is in the limit range.
count is in the limit range.
7
7
6
6
5Bh
00h
Read Only
8 bits
5
5
4
4
W83627EHF/EF, W83627EHG/EG
3
3
2
2
1
- 90 -
1
0
0
VSB_STS
VBAT_STS
TAR3_STS
VIN4_STS
VIN3_STS
VIN2_STS
Reserved
AUXFANIN1_STS
VIN1_STS
TAR4_STS
CPUFANIN1_STS
AUXFANIN0_STS
CASEOPEN_STS
AUXTIN_STS
TAR1_STS
TAR2_STS
TM
TM
TM
.
.
.