w83627ef Winbond Electronics Corp America, w83627ef Datasheet - Page 53

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w83627ef

Manufacturer Part Number
w83627ef
Description
Lpc Super I/o For Desktop & Server
Manufacturer
Winbond Electronics Corp America
Datasheet
Bit 6-0: CPUFANOUT0 PWM Pre-Scale divider. This is the divider of clock source of PWM
output frequency. The maximum divider is 128 (7Fh). This divider should not be set to 0.
the formula is
6.8.6
Register Location:
Power on Default Value:
Attribute:
Size:
(1)If CPUFANOUT0 be programmed as PWM output (Bank0 Index 04h.bit1 is 0)
Bit 7-0: CPUFANOUT0 PWM Duty Cycle. Write FFh, CPUFANOUT0 duty cycle is 100%. Write 00h,
Note. XXh: PWM Duty Cycle output percentage is (XX/256*100%) during one cycle.
(2)If CPUFANOUT0 be programmed as DC Voltage output (Bank0 Index 04h.bit1 is 1)
Bit 7-2: CPUFANOUT0 voltage control.
Bit 1-0: Reserved.
Note. See the Table 6.4
CPUFANOUT0 Output Value Select Register - Index 03h (Bank 0)
CPUFANOUT duty cycle is 0%.
01h : divider is 1
02h : divider is 2
03h : divider is 3
:
:
OUTPUT Voltage =
7
PWM output frequency =
6
5
03h
FFh
Read/Write
8 bits
4
AVCC
3
W83627EHF/EF, W83627EHG/EG
2
*
FANOUT
1
- 47 -
64
0
Pre_Scale
Input
Clock
CPUFANOUT0 Value
Divider
Publication Release Date: Nov. 2006
256
1
Revision 1.3

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