tea1750t-n1 NXP Semiconductors, tea1750t-n1 Datasheet - Page 7

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tea1750t-n1

Manufacturer Part Number
tea1750t-n1
Description
Tea1750 Greenchip Iii Smps Control Ic
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
TEA1750_1
Product data sheet
7.1.2 Supply management
7.1.3 Latch input
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
Pin LATCH is a general purpose input pin, which can be used to switch off both
converters. The pin sources a current, I
both converters is stopped as soon as the voltage on this pin drops below 1.25 V.
At initial start-up, switching is inhibited until the voltage on the LATCH pin is above 1.35 V
(typ.). No internal filtering is done on this pin. An internal Zener clamp of 2.7 V (typ.)
protects this pin from excessive voltages.
Fig 4. Start-up sequence, normal operation, and re-start sequence
PROTECTION
PFCDRIVER
PFCSENSE
VINSENSE
FBDRIVER
VOSENSE
FBSENSE
FBCTRL
LATCH
V
V
I
HV
CC
out
CHARGING VCC
CAPACITOR
Rev. 01 — 6 April 2007
CONVERTERS
STARTING
OPERATION
NORMAL
O(LATCH)
soft start
soft start
PROTECTION
on pin LATCH (typ. 80 A). Switching of
GreenChip III SMPS control IC
RESTART
TEA1750
© NXP B.V. 2007. All rights reserved.
V
V
V
V
V
V
V
startup
th(UVLO)
trip
start(VINSENSE)
en(LATCH)
to(FBCTRL)
start(fb)
014aaa060
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