at25dq321a ATMEL Corporation, at25dq321a Datasheet - Page 20

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at25dq321a

Manufacturer Part Number
at25dq321a
Description
32-megabit 2.7-volt Minimum Spi Serial Flash Memory With Dual-i/o And Quad-i/o Support
Manufacturer
ATMEL Corporation
Datasheet

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8.6
Program/Erase Suspend
In some code plus data storage applications, it is often necessary to process certain high-level system interrupts
that require relatively immediate reading of code or data from the Flash memory. In such an instance, it may not be
possible for the system to wait the microseconds or milliseconds required for the Flash memory to complete a
program or erase cycle. The Program/Erase Suspend command allows a program or erase operation in progress
to a particular 64-Kbyte sector of the Flash memory array to be suspended so that other device operations can be
performed. For example, by suspending an erase operation to a particular sector, the system can perform
functions such as a program or read operation within another 64-Kbyte sector in the device. Other device
operations, such as a Read Status Register, can also be performed while a program or erase operation is
suspended.
Table 8-1
outlines the operations that are allowed and not allowed during a program or erase suspend.
Since the need to suspend a program or erase operation is immediate, the Write Enable command does not need
to be issued prior to the Program/Erase Suspend command being issued. Therefore, the Program/Erase Suspend
command operates independently of the state of the WEL bit in the Status Register.
To perform a Program/Erase Suspend, the CS pin must first be asserted and the opcode of B0h must be clocked
into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will
be ignored. When the CS pin is deasserted, the program or erase operation currently in progress will be
suspended within a time of t
. The Program Suspend (PS) bit or the Erase Suspend (ES) bit in the Status
SUSP
Register will then be set to the logical “1” state to indicate that the program or erase operation has been
suspended. In addition, the RDY/BSY bit in the Status Register will indicate that the device is ready for another
operation. The complete opcode must be clocked into the device before the CS pin is deasserted, and the CS pin
must be deasserted on non-byte boundary (multiples of eight bits); otherwise, no suspend operation will be
performed.
If the Program/Erase Suspend command is issued while the device is not busy performing a program or erase
operation, (CRDY/BSY is in the logic “1” state), then the device is simply ignore the Program/Erase Suspend
command and the PS and ES bits in the status Register will indicate that the device is not in a suspend state, (PS
and ES will be a logic “0”).
Read operations are not allowed to a 64-Kbyte sector that has had its program or erase operation suspended. If a
read is attempted to a suspended sector, then the device will output undefined data. Therefore, when performing a
Read Array operation to an unsuspended sector and the device’s internal address counter increments and crosses
the sector boundary to a suspended sector, the device will then start outputting undefined data continuously until
the address counter increments and crosses a sector boundary to an unsuspended sector.
A program operation is not allowed to a sector that has been erase suspended. If a program operation is attempted
to an erase suspended sector, then the program operation will abort and the WEL bit in the Status Register will be
reset back to the logical “0” state. Likewise, an erase operation is not allowed to a sector that has been program
suspended. If attempted, the erase operation will abort and the WEL bit in the Status Register will be reset to a
logical “0” state.
During an Erase Suspend, a program operation to a different 64-Kbyte sector can be started and subsequently
suspended. This results in a simultaneous Erase Suspend/Program Suspend condition and will be indicated by the
states of both the ES and PS bits in the Status Register being set to the logical “1” state.
If a Reset operation (see
“Reset” on page
44) is performed while a sector is erase suspended, the suspend
operation will abort and the contents of the block in the suspended sector will be left in an undefined state.
However, if a Reset is performed while a sector is program suspended, the suspend operation will abort but only
the contents of the page that was being programmed and subsequently suspended will be undefined. The
remaining pages in the 64-Kbyte sector will retain their previous contents.
AT25DQ321A [Preliminary]
20
8718A–DFLASH–04/10

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