at88sa100s ATMEL Corporation, at88sa100s Datasheet - Page 8

• Manufacturer Part Number: at88sa100s
• Description: Battery Authentication Chip
• Manufacturer: ATMEL Corporation

3.1.
3.1.1. Command Timing
8
IO Flags
The host system is always the bus master, so before any IO transaction, the system must first send an 8 bit flag to the
chip to indicate the IO operation that is to be performed, as follows:
All other values are reserved and will be ignored.
After a command flag is transmitted, a command block should be sent to the chip. During parsing of the parameters
and subsequent execution of a properly received command, the chip will be busy and not respond to transitions on the
signal pin. The delays for these operations are listed in the table below:
Table 5.
In this document, t
chip.
AT88SA100S [Preliminary]
Value
0x77
0x88
0xCC
ParsingDelay
MemoryDelay
FuseDelay
MacDelay
PersonalizeDelay
Parameter
Name
Command
Transmit
Sleep
Command Timing
EXEC
t
t
t
t
t
PARSE
EXEC_MEM
EXEC_FUSE
EXEC_MAC
PERSON
is used as shorthand for the delay corresponding to whatever command has been sent to the
Symbol
Meaning
After this flag, the system starts sending a command block to the chip. The first bit of the
block can follow immediately after the last bit of the flag.
After a turn-around delay, the chip will start transmitting the response for a previously
transmitted command block.
Upon receipt of a sleep flag, the chip will enter a low power mode until the next wake token
is received.
Min Max
190
50
15
0
7
100
400
50
30
15
Unit
ms
ms
μs
μs
μs
Delay to check CRC and parse opcode and parameters
before an error indication will be available
Delay to execute Read, Write and/or SramLock commands
Delay to execute BurnFuse command at Vcc > 4.5V, see
Section 4.3 for more details.
Delay to execute MAC command
Delay to execute GenPersonalizationKey or LoadSram
Notes
8558B–SMEM–09/09