is42s16800al-7tli Integrated Silicon Solution, Inc., is42s16800al-7tli Datasheet - Page 25

• Manufacturer Part Number: is42s16800al-7tli
• Description: 128-mbit Low-power Synchronous Dram
• Manufacturer: Integrated Silicon Solution, Inc.

IS42S81600AL, IS42S16800AL, IS42S32400AL
IS42LS81600AL, IS42LS16800AL, IS42LS32400AL
Integrated Silicon Solution, Inc. — www.issi.com —
PRELIMINARY
09/18/03
REGISTER DEFINITION
Extended Mode Register
The mode register is used to define the specific SDRAM
low-power features. This includes the Temperature Com-
pensated Self Refresh (TCSR) and Partial Array Self
Refresh (PASR) as shown in EXTENDED MODE REGIS-
TER DEFINITION.
The extended mode register is programmed via the EX-
TENDED LOAD MODE REGISTER command (M13=1,
M12=0) and will retain the stored information until it is pro-
grammed again or the device loses power.
MODE REGISTER DEFINITION
BA1 BA0
M13
1
M12
0
INFORMATION
A11 A10 A9 A8 A7 A6 A5
Rev. 00A
M11-M5
0
1-800-379-4774
Extended Mode register bits M0-M2 controls PASR and M3-
M4 controls (TCSR). M5 - M11 must be programmed to 0.
The Extended Mode Register must be loaded when all
banks are idle and no bursts are in progress. The controller
must initialize the operation after waiting the specified time.
. Violating either of these requirements will result in unspeci-
fied operation.
M4
1
0
0
1
A4 A3
TCSR
M3
0
1
0
1
Max. Case Temp.
M2
A2
0
0
0
0
1
1
1
1
15 C
45 C
70 C
85 C
PASR
M1
0
0
1
1
0
0
1
1
A1 A0
M0
0
1
0
1
0
1
0
1
Self Refresh Coverage
Address Bus
Extended Mode
Register (Mx)
2 banks (Bank 0,1)
1 bank (Bank 0)
1/2 bank (Bank 0)
1/4 bank (Bank 0)
Reserved
Reserved
Reserved
4 banks
ISSI
25
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