is42s16800al-7tli Integrated Silicon Solution, Inc., is42s16800al-7tli Datasheet - Page 33

• Manufacturer Part Number: is42s16800al-7tli
• Description: 128-mbit Low-power Synchronous Dram
• Manufacturer: Integrated Silicon Solution, Inc.

IS42S81600AL, IS42S16800AL, IS42S32400AL
IS42LS81600AL, IS42LS16800AL, IS42LS32400AL
Integrated Silicon Solution, Inc. — www.issi.com —
PRELIMINARY
09/18/03
same bank. The PRECHARGE command should be is-
sued x cycles before the clock edge at which the last desired
data element is valid, where x equals the CAS latency minus
one. This is shown in the READ to PRECHARGE diagram for
each possible CAS latency; data element n + 3 is either the
last of a burst of four or the last desired of a longer burst.
Following the PRECHARGE command, a subsequent com-
mand to the same bank cannot be issued until t
that part of the row precharge time is hidden during the
access of the last data element(s).
In the case of a fixed-length burst being executed to comple-
tion, a PRECHARGE command issued at the optimum time
(as described above) provides the same operation that
would result from the same fixed-length burst with auto
precharge. The disadvantage of the PRECHARGE com-
mand is that it requires that the command and address
buses be available at the appropriate time to issue the
command; the advantage of the PRECHARGE command is
that it can be used to truncate fixed-length or full-page
bursts.
Full-page READ bursts can be truncated with the BURST
TERMINATE command, and fixed-length READ bursts
may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST
TERMINATE command should be issued x cycles before
the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
shown in the READ Burst Termination diagram for each
possible CAS latency; data element n + 3 is the last desired
data element of a longer burst.
INFORMATION
Rev. 00A
RP
is met. Note
1-800-379-4774
ISSI
33
®