m28w160bt90zb1t STMicroelectronics, m28w160bt90zb1t Datasheet

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m28w160bt90zb1t

Manufacturer Part Number
m28w160bt90zb1t
Description
Mbit Boot Block Supply Flash Memory
Manufacturer
STMicroelectronics
Datasheet
FEATURES SUMMARY
May 2002
SUPPLY VOLTAGE
– V
– V
– V
ACCESS TIME: 70, 85, 90,100ns
PROGRAMMING TIME
– 10µs typical
– Double Word Programming Option
COMMON FLASH INTERFACE
– 64 bit Security Code
MEMORY BLOCKS
– Parameter Blocks (Top or Bottom location)
– Main Blocks
BLOCK PROTECTION on TWO PARAMETER
BLOCKS
– WP for Block Protection
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M28W160BT: 90h
– Bottom Device Code, M28W160BB: 91h
DD
DDQ
PP
= 12V for fast Program (optional)
= 2.7V to 3.6V Core Power Supply
= 1.65V to 3.6V for Input/Output
Figure 1. Packages
16 Mbit (1Mb x16, Boot Block)
3V Supply Flash Memory
6.39 x 6.37mm
TFBGA46 (ZB)
6.39 x 6.37mm
µBGA46 (GB)
12 x 20mm
TSOP48 (N)
M28W160BB
M28W160BT
FBGA
BGA
1/45

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m28w160bt90zb1t Summary of contents

Page 1

... ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M28W160BT: 90h – Bottom Device Code, M28W160BB: 91h May 2002 M28W160BT M28W160BB 16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory Figure 1. Packages BGA µBGA46 (GB) 6.39 x 6.37mm FBGA TFBGA46 (ZB) 6.39 x 6.37mm TSOP48 (N) ...

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... Write Output Disable Standby Automatic Standby Reset Table 2. Bus Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 COMMAND INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read Status Register Command Read Electronic Signature Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read CFI Query Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Block Erase Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Program Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Double Word Program Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Clear Status Register Command Program/Erase Suspend Command ...

Page 3

... Table 5. Memory Blocks Protection Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 6. Program, Erase Times and Program/Erase Endurance Cycles . . . . . . . . . . . . . . . . . . . . 15 STATUS REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Program/Erase Controller Status (Bit Erase Suspend Status (Bit Erase Status (Bit Program Status (Bit Status (Bit 3 Program Suspend Status (Bit Block Protection Status (Bit 1) ...

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M28W160BT, M28W160BB Table 19. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

... The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The memory is offered in TSOP48 (10 X 20mm), µBGA46 (6.39 x 6.37mm 0.75mm pitch) and , TFBGA46 (6.39 x 6.37mm, 0.75mm pitch) packag- es and is supplied with all the bits erased (set to ’ ...

Page 6

M28W160BT, M28W160BB Figure 3. TSOP Connections 6/45 A15 1 48 A14 A13 A12 A11 A10 M28W160BT M28W160BB A19 A18 A17 ...

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Figure 4. µBGA Connections (Top view through package A13 B A14 C A15 D A16 E V DDQ A11 A18 A10 W A12 A9 DQ14 DQ5 ...

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M28W160BT, M28W160BB Figure 5. TFBGA Connections (Top view through package A13 B A14 A15 C D A16 E V DDQ 8/ A11 A18 A10 W A12 ...

Page 9

Figure 6. Block Addresses M28W160BT Top Boot Block Addresses FFFFF 4 KWords FF000 F8FFF 4 KWords F8000 F7FFF 32 KWords F0000 0FFFF 32 KWords 08000 07FFF 32 KWords 00000 Note: Also see Appendix A, Tables 22 and 23 for a ...

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... Table 4, Mem- ory Blocks Protection Truth). Reset (RP). The Reset input provides a hard- ware reset of the memory. When Reset the memory is in reset mode: the outputs are high impedance and the current consumption is mini- 10/45 mized. When Reset mal operation ...

Page 11

... Disable, Standby, Automatic Standby and Re- set. See Table 2, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. Read. Read Bus operations are used to output the contents of the Memory Array, the Electronic Signature, the Status Register and the Common Flash Interface ...

Page 12

... M28W160BT, M28W160BB COMMAND INTERFACE All Bus Write operations to the memory are inter- preted by the Command Interface. Commands consist of one or more sequential Bus Write oper- ations. An internal Program/Erase Controller han- dles all timings and verifies the correct execution of the Program and Erase commands. The Pro- ...

Page 13

... Program- ming aborts if Reset goes to V cannot be guaranteed when the program opera- tion is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix C, Figure 21, Double Word Pro- gram Flowchart and Pseudo Code, for the flow- chart for using the Double Word Program command ...

Page 14

... Note Don't Care. 2. A0=V outputs Manufacturer code, A0 Addr 1 and Addr 2 must be consecutive Addresses differing only for A0. Table 4. Read Electronic Signature Code Device Manufact. Code M28W160BT Device Code M28W160BB Note Table 5. Memory Blocks Protection Truth Table ( ( ...

Page 15

Table 6. Program, Erase Times and Program/Erase Endurance Cycles Parameter Word Program Double Word Program Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) Test Conditions Min ...

Page 16

... Erase Suspend Status bit returns Low. 16/45 Erase Status (Bit 5). The Erase Status bit can be used to identify if the memory has failed to verify that the block has erased correctly. When the Erase Status bit is High (set to ‘1’), the Program/ Erase Controller has applied the maximum num- ber of pulses to the block and still failed to verify that the block has erased correctly ...

Page 17

... When a Program/Erase Resume command is is- sued the Program Suspend Status bit returns Low. Block Protection Status (Bit 1). The Block Pro- tection Status bit can be used to identify if a Pro- gram or Erase operation has tried to modify the contents of a protected block ...

Page 18

... Supply Voltage DD DDQ V Program Voltage PP Note: 1. Depends on range. 18/45 these or any other conditions above those indicat the Operating sections of this specification is not implied. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter (1) Value Unit Min Max –40 85 – ...

Page 19

DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC characteristics Tables that follow, are de- rived from tests performed ...

Page 20

M28W160BT, M28W160BB Table 11. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) DD Supply Current (Stand- DD1 Automatic Stand-by) Supply Current I DD2 (Reset) I Supply Current (Program) ...

Page 21

Figure 9. Read Mode AC Waveforms A0-A19 E G DQ0-DQ15 ADDR. VALID CHIP ENABLE Table 12. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC ...

Page 22

M28W160BT, M28W160BB Figure 10. Write AC Waveforms, Write Enable Controlled 22/45 ...

Page 23

Table 13. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH Chip ...

Page 24

M28W160BT, M28W160BB Figure 11. Write AC Waveforms, Chip Enable Controlled 24/45 ...

Page 25

Table 14. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH Chip ...

Page 26

M28W160BT, M28W160BB Figure 12. Power-Up and Reset AC Waveforms tVDHPH VDD, VDDQ Table 15. Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip t PHEL Enable Low, Output Enable ...

Page 27

PACKAGE MECHANICAL Figure 13. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline 1 N/2 TSOP-a Note: Drawing is not to scale. Table 16. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package ...

Page 28

M28W160BT, M28W160BB Figure 14. µBGA46 6.39x6.37mm - ball array, 0.75 mm pitch, Bottom View Package Outline BALL "A1" A Note: Drawing is not to scale Table 17. µBGA46 6.39x6.37mm - 8 x ...

Page 29

Figure 15. µBGA46 Daisy Chain - Package Connections (Top view through package Figure 16. µBGA46 Daisy Chain - PCB Connections proposal (Top view through package ...

Page 30

M28W160BT, M28W160BB Figure 17. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline BALL "A1" A Drawing is not to scale. Table 18. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical ...

Page 31

Figure 18. TFBGA46 Daisy Chain - Package Connections (Top view through package Figure 19. TFBGA46 Daisy Chain - PCB Connections proposal (Top view through package ...

Page 32

... TFBGA46: 6.39 x 6.37mm, 0.75 mm pitch Option T = Tape & Reel Packing Note:Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. ...

Page 33

REVISION HISTORY Table 21. Document Revision History Date Version July 1999 -01 First Issue 9/21/99 -02 Parameter Block Erase Typ. specification change Added t 10/20/99 -03 µBGA Package Mechanical Data change Daisy Chain diagrams, Package and PCB Connections, added 2/09/00 ...

Page 34

M28W160BT, M28W160BB APPENDIX A. BLOCK ADDRESS TABLES Table 22. Top Boot Block Addresses, M28W160BT Size # Address Range (KWord FF000-FFFFF 1 4 FE000-FEFFF 2 4 FD000-FDFFF 3 4 FC000-FCFFF 4 4 FB000-FBFFF 5 4 FA000-FAFFF 6 4 F9000-F9FFF ...

Page 35

... Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. M28W160BT, M28W160BB structure is read from the memory. Tables 24, 25, 26, 27, 28 and 29 show the addresses used to re- trieve the data. The CFI data structure also contains a security area where a 64 bit unique security number is writ- ten (see Table 29, Security Code area) ...

Page 36

M28W160BT, M28W160BB Table 26. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h V [Programming] Supply Minimum Program/Erase voltage PP ...

Page 37

Table 27. Device Geometry Definition Offset Word Data Mode 27h 0015h Device Size = 2 28h 0001h Flash Device Interface Code description 29h 0000h 2Ah 0002h Maximum number of bytes in multi-byte program or page = 2 2Bh 0000h 2Ch ...

Page 38

M28W160BT, M28W160BB Table 28. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h ...

Page 39

... If an error is found, the Status Register must be cleared before further Program/Erase Controller operations. program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0x40) ; /*or writeToFlash (any_address, 0x10 writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...

Page 40

... Address 1 and Address 2 must be consecutive addresses differing only for bit A0. 40/45 double_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x30) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ...

Page 41

Figure 22. Program Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues program_suspend_command ( ) ...

Page 42

... Note error is found, the Status Register must be cleared before further Program/Erase operations. 42/45 erase_command ( blockToErase ) { writeToFlash (any_address, 0x20) ; writeToFlash (blockToErase, 0xD0 only A12-A20 are significannt */ /* Memory enters read status state after the Erase Command */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...

Page 43

Figure 24. Erase Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program Write D0h Erase Continues erase_suspend_command ...

Page 44

M28W160BT, M28W160BB APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 30. Write State Machine Current/Next Data Current SR Read When State bit 7 Array Read (FFh) Read Read “1” Array Array Array Read Read “1” Status Status Array Read ...

Page 45

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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