M28W160B STMICROELECTRONICS [STMicroelectronics], M28W160B Datasheet

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M28W160B

Manufacturer Part Number
M28W160B
Description
16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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FEATURES SUMMARY
May 2002
SUPPLY VOLTAGE
– V
– V
– V
ACCESS TIME: 70, 85, 90,100ns
PROGRAMMING TIME
– 10µs typical
– Double Word Programming Option
COMMON FLASH INTERFACE
– 64 bit Security Code
MEMORY BLOCKS
– Parameter Blocks (Top or Bottom location)
– Main Blocks
BLOCK PROTECTION on TWO PARAMETER
BLOCKS
– WP for Block Protection
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M28W160BT: 90h
– Bottom Device Code, M28W160BB: 91h
DD
DDQ
PP
= 12V for fast Program (optional)
= 2.7V to 3.6V Core Power Supply
= 1.65V to 3.6V for Input/Output
Figure 1. Packages
16 Mbit (1Mb x16, Boot Block)
3V Supply Flash Memory
6.39 x 6.37mm
TFBGA46 (ZB)
6.39 x 6.37mm
µBGA46 (GB)
12 x 20mm
TSOP48 (N)
M28W160BB
M28W160BT
FBGA
BGA
1/45

Related parts for M28W160B

M28W160B Summary of contents

Page 1

... AUTOMATIC STAND-BY MODE PROGRAM and ERASE SUSPEND 100,000 PROGRAM/ERASE CYCLES per BLOCK ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M28W160BT: 90h – Bottom Device Code, M28W160BB: 91h May 2002 M28W160BT M28W160BB 16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory Figure 1 ...

Page 2

... M28W160BT, M28W160BB TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. TSOP Connections Figure 4. µBGA Connections (Top view through package Figure 5. TFBGA Connections (Top view through package Figure 6. Block Addresses SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Address Inputs (A0-A19 Data Input/Output (DQ0-DQ15 Chip Enable (E Output Enable (G) ...

Page 3

... Figure 17. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline30 Table 18. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical Data . . . 30 Figure 18. TFBGA46 Daisy Chain - Package Connections (Top view through package Figure 19. TFBGA46 Daisy Chain - PCB Connections proposal (Top view through package PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 M28W160BT, M28W160BB 3/45 ...

Page 4

... REVISION HISTORY Table 21. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 APPENDIX A. BLOCK ADDRESS TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 22. Top Boot Block Addresses, M28W160BT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 23. Bottom Boot Block Addresses, M28W160BB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 APPENDIX B. COMMON FLASH INTERFACE (CFI Table 24. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 25. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 26. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 27 ...

Page 5

... SUMMARY DESCRIPTION The M28W160B Mbit (1 Mbit x 16) non-vol- atile Flash memory that can be erased electrically at the block level and programmed in-system on a Word-by-Word basis. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. V allows to drive the I/O pin down to DDQ 1 ...

Page 6

... M28W160BT, M28W160BB Figure 3. TSOP Connections 6/45 A15 1 48 A14 A13 A12 A11 A10 M28W160BT M28W160BB A19 A18 A17 A16 V DDQ V SS DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 V DD DQ11 DQ3 ...

Page 7

... A15 D A16 E V DDQ A11 A18 A10 W A12 A9 DQ14 DQ5 DQ11 DQ2 DQ15 DQ6 DQ12 DQ3 DQ7 DQ13 DQ4 V DD M28W160BT, M28W160BB A19 A7 A4 A17 DQ8 E A0 DQ9 DQ0 V SS DQ10 DQ1 G AI02629 7/45 ...

Page 8

... M28W160BT, M28W160BB Figure 5. TFBGA Connections (Top view through package A13 B A14 A15 C D A16 E V DDQ 8/ A11 A18 A10 W A12 A9 DQ14 DQ5 DQ11 DQ2 DQ15 DQ6 DQ12 DQ3 DQ7 DQ13 DQ4 A19 ...

Page 9

... Note: Also see Appendix A, Tables 22 and 23 for a full listing of the Block Addresses. M28W160BB Bottom Boot Block Addresses FFFFF 32 KWords F8000 F7FFF 32 KWords Total of 8 F0000 4 KWord Blocks 0FFFF 08000 07FFF Total of 31 07000 32 KWord Blocks 00FFF 00000 M28W160BT, M28W160BB Total KWord Blocks 32 KWords 4 KWords Total KWord Blocks 4 KWords AI04310 9/45 ...

Page 10

... M28W160BT, M28W160BB SIGNAL DESCRIPTIONS See Figure 2 Logic Diagram and Table 1,Signal Names, for a brief overview of the signals connect this device. Address Inputs (A0-A19). The Address Inputs select the cells in the memory array to access dur- ing Bus Read operations. During Bus Write opera- tions they control the commands sent to the Command Interface of the internal state machine ...

Page 11

... M28W160BT, M28W160BB and the device Standby , and the supply IL . The data Inputs/Out- DD1 , the memory is deselected and the out The power consump- IL during a Pro DQ0-DQ15 PP X Don't Care Data Output ...

Page 12

... M28W160BT, M28W160BB COMMAND INTERFACE All Bus Write operations to the memory are inter- preted by the Command Interface. Commands consist of one or more sequential Bus Write oper- ations. An internal Program/Erase Controller han- dles all timings and verifies the correct execution of the Program and Erase commands. The Pro- ...

Page 13

... Any attempt to Program or Erase pro- tected blocks will abort, the data in the block will not be changed and the Status Register outputs the error. Table 5, Memory Blocks Protection Truth Table, defines the protection methods. M28W160BT, M28W160BB . Program/Erase is aborted When V is below V ...

Page 14

... M28W160BT, M28W160BB Table 3. Commands No. of Commands Cycles Read Memory Array 1+ Read Status Register 1+ Read Electronic Signature 1+ Read CFI Query 1+ Erase 2 Program 2 (3) 3 Double Word Program Clear Status Register 1 Program/Erase Suspend 1 Program/Erase Resume 1 Note Don't Care. 2. A0=V outputs Manufacturer code, A0 Addr 1 and Addr 2 must be consecutive Addresses differing only for A0. ...

Page 15

... 12V ± 12V ± 12V ± 12V ± 12V ± 100,000 M28W160BT, M28W160BB M28W160B Unit Max Typ 10 200 µs 10 200 µ 0.8 ...

Page 16

... M28W160BT, M28W160BB STATUS REGISTER The Status Register provides information on the current or previous Program or Erase operation. The various bits convey information and errors on the operation. To read the Status register the Read Status Register command can be issued, re- fer to the Read Status Register Command section. ...

Page 17

... Note: Refer to Appendix C, Flowcharts and Pseudo Codes, for using the Status Register. Logic Level '1' '0' '1' '0' '1' '0' '1' '0' '1' '0' '1' '0' '1' '0' M28W160BT, M28W160BB new command will appear Definition Ready Busy Suspended In progress or Completed Erase Error Erase Success Program Error Program Success V Invalid, Abort PP ...

Page 18

... M28W160BT, M28W160BB MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. Exposure to Abso- lute Maximum Rating conditions for extended periods may affect device reliability. These are stress ratings only and operation of the device at Table 8 ...

Page 19

... DDQ DDQ / DDQ DDQ Figure 8. AC Measurement Load Circuit V DDQ /2 V DDQ AI00610 0.1µF Test Condition OUT M28W160BT, M28W160BB Conditions summarized 90 100 Max Min Max Min 3.6 2.7 3.6 2.7 3.6 2.7 3.6 1.65 85 – – ...

Page 20

... M28W160BT, M28W160BB Table 11. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) DD Supply Current (Stand- DD1 Automatic Stand-by) Supply Current I DD2 (Reset) I Supply Current (Program) DD3 I Supply Current (Erase) DD4 Supply Current I DD5 (Program/Erase Suspend) ...

Page 21

... OUTPUTS DATA VALID ENABLED Parameter Min Max Min Min Max Max Min Min Max Max Min - t after the falling edge of E without increasing t GLQV M28W160BT, M28W160BB tAXQX tEHQX tEHQZ tGHQX tGHQZ VALID STANDBY M28W160B 100 100 ...

Page 22

... M28W160BT, M28W160BB Figure 10. Write AC Waveforms, Write Enable Controlled 22/45 ...

Page 23

... Note: 1. Sampled only, not 100% tested. 2. Applicable seen as a logic input (V PP Parameter Min Min Min Min Min Low Min PP Min Min Min Min Min Min Min Min Min Min < 3.6V). PP M28W160BT, M28W160BB M28W160B 100 100 ...

Page 24

... M28W160BT, M28W160BB Figure 11. Write AC Waveforms, Chip Enable Controlled 24/45 ...

Page 25

... Note: 1. Sampled only, not 100% tested. 2. Applicable seen as a logic input (V PP Parameter Min Min Min Min Min Min Min Min Min Min Low Min PP Min Min Min Min < 3.6V). PP M28W160BT, M28W160BB M28W160B 100 100 ...

Page 26

... M28W160BT, M28W160BB Figure 12. Power-Up and Reset AC Waveforms tVDHPH VDD, VDDQ Table 15. Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip t PHEL Enable Low, Output Enable Low t PHGL (1,2) Reset Low to Reset High t PLPH (3) Supply Voltages High to Reset High ...

Page 27

... DIE C mm Min Max 1.20 0.05 0.15 0.95 1.05 0.17 0.27 0.10 0.21 19.80 20.20 18.30 18.50 11.90 12.10 – – 0.50 0.70 0° 5° 48 0.10 M28W160BT, M28W160BB inches Typ Min 0.0020 0.0374 0.0067 0.0039 0.7795 0.7205 0.4685 0.0197 – 0.0197 0° 48 Max 0.0472 0.0059 0.0413 0.0106 0.0083 0.7953 0.7283 0.4764 – 0.0279 5° ...

Page 28

... M28W160BT, M28W160BB Figure 14. µBGA46 6.39x6.37mm - ball array, 0.75 mm pitch, Bottom View Package Outline BALL "A1" A Note: Drawing is not to scale Table 17. µBGA46 6.39x6.37mm - ball array, 0.75 mm pitch, Package Mechanical Data Symbol Typ 0.700 b 0.350 D 6.390 D1 5.250 ddd e 0.750 E 6 ...

Page 29

... Figure 15. µBGA46 Daisy Chain - Package Connections (Top view through package Figure 16. µBGA46 Daisy Chain - PCB Connections proposal (Top view through package M28W160BT, M28W160BB AI03298 START POINT END POINT AI3299 29/45 ...

Page 30

... M28W160BT, M28W160BB Figure 17. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline BALL "A1" A Drawing is not to scale. Table 18. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical Data Symbol Typ 0.400 D 6.390 D1 5.250 ddd E 6 ...

Page 31

... Figure 18. TFBGA46 Daisy Chain - Package Connections (Top view through package Figure 19. TFBGA46 Daisy Chain - PCB Connections proposal (Top view through package M28W160BT, M28W160BB AI03298 START POINT END POINT AI3299 31/45 ...

Page 32

... M28W160BT, M28W160BB PART NUMBERING Table 19. Ordering Information Scheme Example: Device Type M28 Operating Voltage 2.7V to 3.6V 1.65V to 3.6V DD DDQ Device Function 160B = 16 Mbit (x16), Boot Block Array Matrix T = Top Boot B = Bottom Boot Speed 100 = 100 ns Package N = TSOP48 µ ...

Page 33

... Commands Table, Read CFI Query Address on 1st cycle changed to ‘X’ (Table 3) t WHEL V DDQ 16-May-2002 -14 descriptions. Revision Details and t WHGL EHGL and I value change DD3 value change Maximum changed to 3.3V description clarified (Table 13) Maximum changed to 3.6V, TFBGA and µBGA package dimensions added to M28W160BT, M28W160BB 33/45 ...

Page 34

... M28W160BT, M28W160BB APPENDIX A. BLOCK ADDRESS TABLES Table 22. Top Boot Block Addresses, M28W160BT Size # Address Range (KWord FF000-FFFFF 1 4 FE000-FEFFF 2 4 FD000-FDFFF 3 4 FC000-FCFFF 4 4 FB000-FBFFF 5 4 FA000-FAFFF 6 4 F9000-F9FFF 7 4 F8000-F8FFF 8 32 F0000-F7FFF 9 32 E8000-EFFFF 10 32 E0000-E7FFF 11 32 D8000-DFFFF 12 32 ...

Page 35

... Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. M28W160BT, M28W160BB structure is read from the memory. Tables 24, 25, 26, 27, 28 and 29 show the addresses used to re- trieve the data. ...

Page 36

... M28W160BT, M28W160BB Table 26. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h V [Programming] Supply Minimum Program/Erase voltage PP 1Dh 00B4h V [Programming] Supply Maximum Program/Erase voltage PP 1Eh 00C6h 1Fh ...

Page 37

... Block size in Region 1 = 0020h * 256 byte 31h 001Eh Region 2 Information 32h 0000h Number of identical-size erase block = 001Eh+1 33h 0000h Region 2 Information 34h 0001h Block size in Region 2 = 0100h * 256 byte Description n in number of bytes M28W160BT, M28W160BB Value 2MByte x16 Async 64KByte 8 8KByte 8 8KByte 31 64KByte ...

Page 38

... M28W160BT, M28W160BB Table 28. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version number, ASCII (P+4)h = 39h 0030h Minor version number, ASCII (P+5)h = 3Ah 0006h Extended Query table contents for Primary Algorithm ...

Page 39

... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; Program if (status_register.b4==1) /*program error */ Error (1, 2) error_handler ( ) ; if (status_register.b1==1) /*program to protect block error */ Block Error (1, 2) error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation or after PP M28W160BT, M28W160BB AI03538b 39/45 ...

Page 40

... M28W160BT, M28W160BB Figure 21. Double Word Program Flowchart and Pseudo Code Start Write 30h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Read Status Register YES YES YES NO Program to Protected Block Error (1, 2) YES End Note: 1. Status check of b1 (Protected Block sequence ...

Page 41

... NO NO Program Complete if (status_register.b2==0) /*program completed */ else Write FFh } Read Data M28W160BT, M28W160BB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if program has already completed */ status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued) ...

Page 42

... M28W160BT, M28W160BB Figure 23. Erase Flowchart and Pseudo Code Start Write 20h Write Block Address & D0h Read Status Register YES YES YES b4 YES YES End Note error is found, the Status Register must be cleared before further Program/Erase operations. ...

Page 43

... (status_register.b6==0) /*erase completed */ Erase Complete else Write FFh Read Data } M28W160BT, M28W160BB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if erase has already completed */ status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; ...

Page 44

... M28W160BT, M28W160BB APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 30. Write State Machine Current/Next Data Current SR Read When State bit 7 Array Read (FFh) Read Read “1” Array Array Array Read Read “1” Status Status Array Read Electronic Read “1” ...

Page 45

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