s-24cs64a Seiko Instruments Inc., s-24cs64a Datasheet - Page 17

• Manufacturer Part Number: s-24cs64a
• Description: 2-wire Cmos Serial E2prom
• Manufacturer: Seiko Instruments Inc.

Rev.4.1
7.3 Sequential Read
When the E
following a start condition both in current and random read operations, it responds with an acknowledge.
An 8-bit data is then sent from the E
automatically incremented at the falling edge of the SCL clock for the 8th bit data.
When the master device responds with an acknowledge, the data at the next memory address is
transmitted. Response with an acknowledge by the master device has the memory address counter in the
E
The master device outputs stop condition not an acknowledge, the reading of E
Data can be read in succession in the sequential read mode. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
2
PROM incremented and makes it possible to read data in succession. This is called “Sequential Read”.
SDA
LINE
_00
DEVICE
ADDRESS
2
PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
R
E
A
D
1
R
W
/
A
C
K
D7
DATA(n)
Figure 17 Sequential Read
ADR INC
D0
2
PROM synchronous to the SCL clock and the address counter is
A
C
K
Seiko Instruments Inc.
D7
DATA (n+1)
ADR INC
D0
A
C
K
D7
2-WIRE CMOS SERIAL E
DATA (n+2)
ADR INC
D0
A
C
K
2
PROM is ended.
D7
NO ACK from
Master Device
DATA (n+x)
S-24CS64A
ADR INC
D0
2
PROM
S
T
O
P
17