s-24c128ci-t8t1u3 Seiko Instruments Inc., s-24c128ci-t8t1u3 Datasheet - Page 14

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s-24c128ci-t8t1u3

Manufacturer Part Number
s-24c128ci-t8t1u3
Description
2-wire Serial Eeprom S-24c128c 128k-bit
Manufacturer
Seiko Instruments Inc.
Datasheet
14
SDA LINE
2-WIRE CMOS SERIAL E
S-24C128C
WP
6. 3 Write Protect
Write protect is available in the S-24C128C. When the WP pin is connected to the V
memory area is inhibited.
When the WP pin is connected to GND or set in high impedance, the write protect is invalid, and write operation
in all memory area is available.
Fix the level of the WP pin from start condition in the write operation (byte write, page write) until stop condition.
If the WP pin changes during this time, the address data being written at this time is not guaranteed. Regarding
the timing of write protect, refer to Figure 6 .
In not using the write protect, connect the WP pin to GND or set it open. The write protect is valid in the range
of operation power supply voltage.
As seen in Figure 14 when the write protect is valid, the S-24C128C does not generate an acknowledgment
signal after data input.
S
A
R
T
T
M
S
B
1 0 1 0
ADDRESS
DEVICE
A2 A1 A0
S
B
L
W
W
R
R
T
E
0
/
I
2
PROM
C
A
K
X
WORD ADDRESS
X
W13
UPPER
Figure 14 Write Protect
W12 W11 W10 W9 W8
Seiko Instruments Inc.
A
C
K
W7 W6 W5 W4 W3 W2 W1 W0
LOWER WORD
ADDRESS
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
CC
DATA
, write operation to
Rev.2.0
N
C
A
K
O
S
T
P
_00_H

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