s-24c128ci-t8t1u3 Seiko Instruments Inc., s-24c128ci-t8t1u3 Datasheet - Page 22

• Manufacturer Part Number: s-24c128ci-t8t1u3
• Description: 2-wire Serial Eeprom S-24c128c 128k-bit
• Manufacturer: Seiko Instruments Inc.

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2-WIRE CMOS SERIAL E
S-24C128C
3. Phase adjustment during S-24C128C access
[How to reset S-24C128C]
SDA
SCL
The S-24C128C does not have a pin to reset (the internal circuit). The users cannot forcibly reset it externally. If
the communication to the S-24C128C interrupted, the users need to handle it as you do for software.
In the S-24C128C, users are able to reset the internal circuit by inputting a start condition and a stop condition.
Although the reset signal is input to the master device, the S-24C128C’s internal circuit does not go in reset, but it
does by inputting a stop condition to the S-24C128C. The S-24C128C keeps the same status thus cannot do the
next operation. Especially, this case corresponds to that only the master device is reset when the power supply
voltage drops.
If the power supply voltage restored in this status, input the instruction after resetting (adjusting the phase with the
master device) the S-24C128C. How to reset is shown below.
The S-24C128C is able to be reset by a start and stop instructions. When the S-24C128C is reading data “0” or
is outputting the acknowledgment signal, outputs “0” to the SDA line. In this status, the master device cannot
output an instruction to the SDA line. In this case, terminate the acknowledgment output operation or the Read
operation, and then input a start instruction. Figure 24 shows this procedure.
First, input a start condition. Then transmit 9 clocks (dummy clock) of SCL. During this time, the master device
sets the SDA line to “H”. By this operation, the S-24C128C interrupts the acknowledgment output operation or
data output, so input a start condition
sure, input the stop condition to the S-24C128C. The normal operation is then possible.
*1. After 9 clocks (dummy clock), if the SCL clock continues to being output without inputting a start condition,
Remark
S-24C128C may go in the write operation when it receives a stop condition. To prevent this, input a start
condition after 9 clocks (dummy clock).
Condition
Regarding this reset procedure with dummy clock, it is recommended to perform at the system
initialization after applying the power supply voltage.
Start
2
PROM
1
Figure 24 Resetting S-24C128C
*1
. When a start condition is input, the S-24C128C is reset. To make doubly
2
Dummy Clock
Seiko Instruments Inc.
8
9
Condition
Start
Condition
Stop
Rev.2.0
_00_H