s-24c32c Seiko Instruments Inc., s-24c32c Datasheet - Page 27

• Manufacturer Part Number: s-24c32c
• Description: 2-wire Serial Eeprom S-24c32c/64c 32k/64k-bit
• Manufacturer: Seiko Instruments Inc.

Rev.2.0
6. Data hold time (t
7. SDA pin and SCL pin noise suppression time
If SCL and SDA of the S-24C32C/64C are changed at the same time, it is necessary to prevent a start / stop
condition from being mistakenly recognized due to the effect of noise.
The S-24C32C/64C may error if it does not recognize a start / stop condition correctly during transmission.
It is recommended to set the delay time of 0.3 s minimum from a falling edge of SCL for the SDA.
This is to prevent S-24C32C/64C from going in a start / stop condition due to the time lag caused by the load of the
bus line.
The S-24C32C/64C includes a built-in low-pass filter at the SDA and SCL pins to suppress noise. This means that if
the power supply voltage is 5.0 V, noise with a pulse width of 130 ns or less can be suppressed.
For details of the assurable value, refer to noise suppression time (t
_00_H
Noise Suppression Time (t
SDA
SCL
HD.DAT
Figure 31 Noise Suppression Time for SDA and SCL Pins
[ns]
= 0 ns)
Figure 30 S-24C32C/64C Data Hold Time
I
) Max.
Seiko Instruments Inc.
t
HD.DAT
300
200
100
= 0.3 s Min.
Power supply voltage (V
2
l
) in Table 14.
[V]
3
2-WIRE CMOS SERIAL E
4
CC
)
5
S-24C32C/64C
2
PROM
27