m27v101 STMicroelectronics, m27v101 Datasheet - Page 8

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m27v101

Manufacturer Part Number
m27v101
Description
1 Mbit 128kb X 8 Low Voltage Uv Eprom And Otp Eprom
Manufacturer
STMicroelectronics
Datasheet

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M27V101
Figure 6. Programming and Verify Modes AC Waveforms
Figure 7. Programming Flowchart
8/15
YES
NO
FAIL
= 25
++n
V CC
A0-A16
Q0-Q7
V PP
E
P
G
V CC = 6.25V, V PP = 12.75V
CHECK ALL BYTES
NO
2nd: V CC = 4.2V
P = 100 s Pulse
1st: V CC = 6V
VERIFY
n = 0
Addr
Last
YES
YES
tVPHPL
tVCHPL
NO
tAVPL
tELPL
tQVPL
tPLPH
++ Addr
DATA IN
PROGRAM
AI00715C
VALID
tPHQX
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 13 seconds. Program-
ming with PRESTO II involves in applying a se-
quence of 100µs program pulses to each byte until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. No overprogram pulse is applied since the
verify in MARGIN MODE at V
3.6V provides necessary margin to each pro-
grammed cell.
Program Inhibit
Programming of multiple M27V101s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27V101 may be common. A TTL low level pulse
applied to a M27V101's P input, with E low and
V
level E input inhibits the other M27V101s from be-
ing programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
and G at V
6.25V.
PP
tQXGL
at 12.75V, will program that M27V101. A high
VERIFY
tGLQV
DATA OUT
IL
, P at V
IH
, V
PP
tGHQZ
tGHAX
at 12.75V and V
CC
AI00714
much higher than
CC
at

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