mt28f008b3vg-9-tet Micron Semiconductor Products, mt28f008b3vg-9-tet Datasheet - Page 16
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mt28f008b3vg-9-tet
Manufacturer Part Number
mt28f008b3vg-9-tet
Description
8mb Smart 3 Boot Block Flash Memory
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT28F008B3VG-9-TET.pdf
(30 pages)
NOTE:
09005aef81136a91
Q10.fm - Rev. E 6/04 EN
1. Sequence may be repeated to erase additional blocks.
2. Complete status check is not required. However, if SR3 = 1, further ERASEs are inhibited until the status register is
3. To return to the array read mode, the FFh command must be issued.
4. Refer to the ERASE SUSPEND flowchart for more information.
5. If SR3 is set during a WRITE or BLOCK ERASE attempt, CLEAR STATUS REGISTER must be issued before further WRITE or
6. Status register bits 3-5 must be cleared using CLEAR STATUS REGISTER.
cleared.
ERASE operations are allowed by the CEL.
Figure 7: Self-Timed BLOCK ERASE
STATUS REGISTER
ERASE Complete
Check (optional)
Complete Status
V
Block Address
PP
WRITE D0h,
WRITE 20h
= 3.3V or 5V
SR7 = 1?
READ
Start
YES
Sequence
2
3
NO
Suspend ERASE?
1
YES
Sequence
Suspend
NO
ERASE Resumed
4
SMART 3 BOOT BLOCK FLASH MEMORY
16
Figure 8: Complete BLOCK ERASE
Start (ERASE completed)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ERASE Successful
SR4, 5 = 1?
SR3 = 0?
SR5 = 0?
Status-Check Sequence
YES
YES
NO
YES
NO
NO
©2001 Micron Technology, Inc. All rights reserved.
V
Command Sequence Error
BLOCK ERASE Error
PP
Error
5, 6
8Mb
6
6