hm62v8512bltt-8ul Renesas Electronics Corporation., hm62v8512bltt-8ul Datasheet - Page 12

• Manufacturer Part Number: hm62v8512bltt-8ul
• Description: 4 M Sram 512-kword X 8-bit - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

HM62V8512B Series
Low V
Parameter
V
Data retention current
Chip deselect to data retention time
Operation recovery time
Notes: 1. For L-version and 10 A (max.) at Ta = –20 to +40 C.
Low V
12
CC
0 V
V
2.7 V
V
2.0 V
CS
CC
DR
for data retention
CC
2. For L-SL-version and 3 A (max.) at Ta = –20 to +40 C.
3. For L-UL-version and 2 A (max.) at Ta = –20 to +40 C.
4. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin
5. Typical values are at V
6. t
CC
Data Retention Timing Waveform (CS Controlled)
levels (address, WE, OE, I/O) can be in the high impedance state.
Data Retention Characteristics (Ta = –20 to +70 C)
RC
= read cycle time.
t
CDR
CC
= 3.0 V, Ta = +25 C and specified loading, and not guaranteed.
Symbol
V
I
t
t
CCDR
CDR
R
DR
Data retention mode
Min
2
—
—
—
0
t
RC
CS
*
6
V
Typ
—
0.8*
0.8*
0.8*
—
—
CC
– 0.2 V
5
5
5
Max
—
20*
10*
2*
—
—
3
1
2
Unit
V
ns
ns
A
A
A
Test conditions*
CS
V
CS
See retention waveform
CC
= 3.0 V, Vin
V
V
CC
CC
t
– 0.2 V, Vin
– 0.2 V
R
4
0 V
0 V