ncp5306dw ON Semiconductor, ncp5306dw Datasheet - Page 18

• Manufacturer Part Number: ncp5306dw
• Description: Threephase Vrm 9.0 Buck Controller
• Manufacturer: ON Semiconductor

4. Input Inductor Selection
the power source will accomplish two objectives. First, it
will isolate the voltage source and the system from the noise
generated in the switching supply. Second, it will limit the
inrush current into the input capacitors at power up. Large
inrush currents reduce the expected life of the input
capacitors. The inductor’s limiting effect on the input
current slew rate becomes increasingly beneficial during
load transients.
the first few PWM cycles immediately after a step−load
change is applied as shown in Figure 22. When the load is
applied, the output voltage is pulled down very quickly.
Current through the output inductors will not change
instantaneously, so the initial transient load current must be
conducted by the output capacitors. The output voltage will
step downward depending on the magnitude of the output
current (I
capacitors (ESR
capacitors (N
current is shared equally between the three phases, the
output voltage at full transient load will be:
the input voltage will be applied to the opposite terminal of
the output inductor (the SWNODE). At that instant, the
voltage across the output inductor can be calculated as:
V OUT,FULL−LOAD +
DV Lo + V IN * V OUT,FULL−LOAD
The use of an inductor between the input capacitors and
The worst case input current slew rate will occur during
When the control MOSFET (Q1 in Figure 22) turns ON,
V OUT,NO−LOAD * (I O,MAX 3) @ ESR OUT N OUT
+ V IN * V OUT,NO−LOAD
O,MAX
) (I O,MAX 3) @ ESR OUT N OUT
OUT
), the per capacitor ESR of the output
OUT
) as shown in Figure 22. Assuming the load
+
−
I
) and the number of the output
Li
Vi
12 V
TBD
Li
ESR
MAX dI/dt occurs in
first few PWM cycles.
Vi(t = 0) = 12 V
N
Ci
Ci
× Ci
/N
Figure 22. Calculating the Input Inductance
Ci
+
V
Ci
Q1
http://onsemi.com
(14)
(15)
SWNODE
18
Q2
cause its current to increase linearly with time. The slew rate
of this current can be calculated from:
capacitors must initially deliver the vast majority of the
input current. The amount of voltage drop across the input
capacitors (ΔV
capacitors (N
current in the output inductor according to:
inductor (V
to the input voltage V
drop across the input capacitors, ΔV
input inductor as well. Knowing this, the minimum value of
the input inductor can be calculated from:
dI
rate.
is relatively conservative. It assumes the supply voltage is
very “stiff” and does not account for any parasitic elements
that will limit dI/dt such as stray inductance. Also, the ESR
values of the capacitors specified by the manufacturer’s data
sheets are worst case high limits. In reality, input voltage
“sag,” lower capacitor ESRs and stray inductance will help
reduce the slew rate of the input current.
IN
The differential voltage across the output inductor will
Current changes slowly in the input inductor so the input
Before the load is applied, the voltage across the input
The input inductance value calculated from Equation 18
/dt
I
Lo
Lo
MAX
DV Ci + ESR IN N IN @ dI Lo dt @ t ON
Li
is the maximum allowable input current slew
) is very small and the input capacitors charge
IN
+ ESR IN N IN @ dI Lo dt @ D f SW
Ci
Li MIN + V Li
+
), their per capacitor ESR (ESR
ESR
N
) is determined by the number of input
Vo(t = 0) = 1.745 V
Co
dI Lo dt + DV Lo Lo
Co
IN
× Co
+ DV Ci
/N
. After the load is applied, the voltage
Co
V
OUT
dI IN dt MAX
14 u(t)
dI IN dt MAX
Ci
, appears across the
IN
) and the
(16)
(17)
(18)