ncp5306dw ON Semiconductor, ncp5306dw Datasheet - Page 19

• Manufacturer Part Number: ncp5306dw
• Description: Threephase Vrm 9.0 Buck Controller
• Manufacturer: ON Semiconductor

support the maximum current without saturating the
inductor. Also, for an inexpensive iron powder core, such as
the −26 or −52 from Micrometals, the inductance “swing”
with DC bias must be taken into account and inductance will
decrease as the DC input current increases. At the maximum
input current, the inductance must not decrease below the
minimum value or the dI/dt will be higher than expected.
5. MOSFET & Heatsink Selection
drive MOSFET selection. To adequately size the heat sink,
the design must first predict the MOSFET power
dissipation. Once the dissipation is known, the heat sink
thermal impedance can be calculated to prevent the
specified maximum case or junction temperatures from
being exceeded at the highest ambient temperature. Power
dissipation has two primary contributors: conduction losses
and switching losses. The control or upper MOSFET will
display both switching and conduction losses. The
synchronous or lower MOSFET will exhibit only
conduction losses because it switches into nearly zero
voltage. However, the body diode in the synchronous
MOSFET will suffer diode losses during the non−overlap
time of the gate drivers.
can be approximated from:
the MOSFET is ON while the second term represents the
switching losses. The third term is the loss associated with
the control and synchronous MOSFET output charge when
the control MOSFET turns ON. The output losses are caused
by both the control and synchronous MOSFET but are
dissipated only in the control FET. The fourth term is the loss
due to the reverse recovery time of the body diode in the
synchronous MOSFET. The first two terms are usually
adequate to predict the majority of the losses.
the control MOSFET:
I RMS,CNTL + D
P D,CONTROL + (I RMS,CNTL 2 @ R DS(on) )
As with the output inductor, the input inductor must
Power dissipation, package size and thermal requirements
For the upper or control MOSFET, the power dissipation
The first term represents the conduction or IR losses when
I
I
I
I
RMS,CNTL
Lo,MAX
Lo,MIN
O,MAX
@ [(I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN ) I Lo,MIN 2 ) 3] 1 2
) (I Lo,MAX @ Q switch I g @ V IN @ f SW )
) (Q oss 2 @ V IN @ f SW ) ) (V IN @ Q RR @ f SW )
is the maximum converter output current.
is the minimum output inductor current:
is the maximum output inductor current:
I Lo,MAX + I O,MAX 3 ) DI Lo 2
I Lo,MIN + I O,MAX 3 * DI Lo 2
is the RMS value of the trapezoidal current in
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inductor of value L
applied gate drive voltage.
gate−to−source charge plus the gate−to−drain charge. This
may be specified in the data sheet or approximated from the
gate−charge curve as shown in the Figure 23.
dissipation can be approximated from:
the MOSFET is ON and the second term represents the diode
losses that occur during the gate non−overlap time.
control MOSFET with the exception of:
I RMS,SYNCH + 1 * D
P D,SYNCH + (I RMS,SYNCH 2 @ R DS(on) )
V
D is the duty cycle of the converter:
ΔI
R
Q
I
V
f
Q
Q
For the lower or synchronous MOSFET, the power
The first term represents the conduction or IR losses when
All terms were defined in the previous discussion for the
g
sw
GS_TH
@ [(I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN ) I Lo,MIN 2 ) 3] 1 2
DS(on)
switch
IN
RR
oss
in the data sheet.
Lo
Figure 23. MOSFET Switching Characteristics
is the output current from the gate driver IC.
Q
is the switching frequency of the converter.
) (Vf diode @ I O,MAX 3 @ t_nonoverlap @ f SW )
GS1
is the input voltage to the converter.
is the sum of all the MOSFET output charge specified
is the reverse recovery charge of the lower MOSFET.
is the peak−to−peak ripple current in the output
DI Lo + (V IN * V OUT ) @ D (Lo @ f SW )
is the ON resistance of the MOSFET at the
is the post gate threshold portion of the
Q
GS2
Q switch + Q gs2 ) Q gd
o
:
D + V OUT V IN
Q
GD
I
D
V
DRAIN
V
GATE
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