lm5066pmhx National Semiconductor Corporation, lm5066pmhx Datasheet - Page 18

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lm5066pmhx

Manufacturer Part Number
lm5066pmhx
Description
High Voltage System Power Management And Protection Ic With Pmbus
Manufacturer
National Semiconductor Corporation
Datasheet

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Application Section
DESIGN-IN PROCEDURE
Refer to
is the step-by-step procedure for hardware design of the
LM5066. This procedure refers to section numbers that pro-
vide detailed information on the following design steps. The
recommended design-in procedure is as follows:
MOSFET Selection: Determine MOSFET based on break-
down voltage, current and power ratings.
Current Limit, R
(I
mum load current, allowing for tolerances in the current sense
resistor value and the LM5066 Current Limit threshold volt-
age. Use equation 1 to determine the value for R
Power Limit Threshold: Determine the maximum allowable
power dissipation for the series pass MOSFET (Q
device’s SOA information. Use equation 2 to determine the
value for R
not accurately specify the device SOA so it is usually benefi-
cial to choose a conservative value when selecting R
Turn-on Time and TIMER Capacitor, C
ue for the timing capacitor at the TIMER pin (C
tion 7 and 8. The fault timeout period (t
than the circuit’s turn-on time. The turn-on time can be esti-
mated using the equations in the TURN-ON TIME section of
LIM
). This threshold must be higher than the normal maxi-
Figure 6
PWR
. Note that many MOSFET manufacturers do
for Typical Application Circuit. The following
S
: Determine the current limit threshold
FAULT
T
: Determine the val-
) MUST be longer
FIGURE 6. Typical Application Circuit
T
) using equa-
1
S
), using the
.
PWR
.
18
this data sheet, but should be verified experimentally. Review
the resulting insertion time and the restart timing if retry is
enabled.
UVLO, OVLO: Choose option A, B, C, or D from the UVLO,
OVLO section of the Application Information to set the UVLO
and OVLO thresholds and hysteresis. Use the procedure for
the appropriate option to determine the resistor values at the
UVLO/EN and OVLO pins.
Power Good: Choose the appropriate output voltage and
calculate the required resistor divider from the output voltage
to the FB pin. Choose either VDD or OUT to connect a prop-
erly sized pull-up resistor for the Power Good output (PGD).
Refer to Programming Guide section: After all hardware
design is complete, refer to the programming guide for a step
by step procedure regarding software.
MOSFET SELECTION
It is recommended that the external MOSFET (Q
is based on the following criteria:
- The BV
tem voltage (V
at V
removed.
IN
when the circuit card, or adjacent cards, are inserted or
DSS
rating should be greater than the maximum sys-
IN
), plus ringing and transients which can occur
30115901
1
) selection

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