stcf03i STMicroelectronics, stcf03i Datasheet - Page 15

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stcf03i

Manufacturer Part Number
stcf03i
Description
High Power White Led Driver With I2ctm Interface
Manufacturer
STMicroelectronics
Datasheet

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0
7.4
Figure 4.
7.5
Figure 5.
7.6
15/33
Data validity
As shown in
clock. The HIGH and LOW state of the data line can only change when the clock signal on
the SCL line is LOW.
Data validity on the I
Start and stop conditions
Both DATA and CLOCK lines remain HIGH when the bus is not busy. As shown in
a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. A STOP condition
must be sent before each START condition.
Timing diagram on I
Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first. One data bit is transferred during each clock
Figure
4, the data on the SDA line must be stable during the high period of the
2
2
C Bus
C Bus
Figure
5,

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