tle5011 Infineon Technologies Corporation, tle5011 Datasheet - Page 24

• Manufacturer Part Number: tle5011
• Description: Gmr Based Angular Sensor
• Manufacturer: Infineon Technologies Corporation

7
The clock signal input “CLK” must fulfill certain requirements, as identified in this section:
• The high or low pulse width must not exceed the specified values, because the PLL
• The duty cycle factor should be 0.5 but can deviate to the values limited by
• The PLL is triggered at the positive edge of the clock. If more than 2 edges are
Figure 6
Table 12
Parameter
Input Frequency
CLK Duty Cycle
CLK rise time
CLK fall time
PLL Frequency
Digital Clock
Digital Clock Periode
1)
Target Data Sheet
needs a minimum pulse width and must be spike filtered.
and
missing, a chip reset is generated automatically.
Minimum duty cycle factor: t
Maximum duty cycle factor: t
t
CLKl(f_min)
Clock Supply (CLK Timing Definition)
CLK Timing Definition
CLK Timing Specification
1)
.
t
CLKh
Symbol
f
CLK
t
t
f
f
t
CLK
CLKr
CLKf
PLL
DIG
DIG
CLKh(f_min)
CLKh(f_max)
DUTY
/ t
t
CLK
/ t
Limit Values
min.
3.9
30
-
-
-
-
-
CLK(f_min)
CLK(f_min)
t
CLKl
24
with t
with t
typ.
4.00
50
-
-
100
25
40
CLK(f_min)
CLKh(f_max)
Clock Supply (CLK Timing Definition)
max.
4.2
70
20
20
-
-
-
= 1 / f
= t
CLK(f_min)
CLK(f_min)
Unit
MHz
%
ns
ns
MHz
MHz
ns
- t
CLKl(min)
Notes
from
from
f
( 25 / 4 ) *
4 / (25 *
CLK
V 0.11, 2008-01
* 25
t
V
V
t
TLE5011
CLKh(f_min)
L
H
V
V
to
f
to
H
L
CLK
f
V
V
CLK
H
L
)