atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 94
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atmega3250v-8auatmega325v-8ai
Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA3250V-8AUATMEGA325V-8AI.pdf
(362 pages)
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15.8
94
Timer/Counter Timing Diagrams
ATmega325/3250/645/6450
•
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
shows the count sequence close to the MAX value in all modes other than phase correct PWM
mode.
Figure 15-8. Timer/Counter Timing Diagram, no Prescaling
Figure 15-9
Figure 15-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 15-10
Figure 15-10. Timer/Counter Timing Diagram, Setting of OCF0A, with Prescaler (f
The timer starts counting from a value higher than the one in OCR0A, and for that reason
misses the Compare Match and hence the OCn change that would have happened on the
way up.
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
TOVn
TOVn
OCFnx
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
I/O
I/O
Tn
Tn
Tn
/1)
/8)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0A in all modes except CTC mode.
Figure 15-8
OCRnx - 1
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
OCRnx
MAX
MAX
OCRnx Value
OCRnx + 1
BOTTOM
BOTTOM
clk_I/O
/8)
T0
) is therefore shown as a
BOTTOM + 1
BOTTOM + 1
OCRnx + 2
clk_I/O
2570L–AVR–08/07
/8)
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