mc9s08dz32amlfr Freescale Semiconductor, Inc, mc9s08dz32amlfr Datasheet - Page 195

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mc9s08dz32amlfr

Manufacturer Part Number
mc9s08dz32amlfr
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
8.5.4
The IRC is calibrated by writing to the MCGTRM register first, then using the FTRIM bit to “fine tune”
the frequency. We will refer to this total 9-bit value as the trim value, ranging from 0x000 to 0x1FF, where
the FTRIM bit is the LSB.
The trim value after reset is the factory trim value unless the device resets into any BDM mode in which
case it is 0x800. Writing a larger value will decrease the frequency and smaller values will increase the
frequency. The trim value is linear with the period, except that slight variations in wafer fab processing
produce slight non-linearities between trim value and period. These non-linearities are why an iterative
Freescale Semiconductor
Calibrating the Internal Reference Clock (IRC)
Figure 8-12. Flowchart of BLPI to FEE Mode Transition using an 8 MHz crystal
MCGC2 = $36
MCGC1 = $18
OSCINIT = 1 ?
MCGC2 = $00
I
CHECK LOCK
N BLPI MODE
CHECK
OPTIONAL:
START
= 1?
YES
YES
NO
NO
MC9S08DZ128 Series Data Sheet, Rev. 1
CLKST = %00?
Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
IREFST = 0?
CHECK LOCK
IN FEE MODE
OPTIONAL:
CONTINUE
CHECK
CHECK
= 1?
YES
YES
YES
NO
NO
NO
195

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