mc9s12uf32 Freescale Semiconductor, Inc, mc9s12uf32 Datasheet - Page 120

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mc9s12uf32

Manufacturer Part Number
mc9s12uf32
Description
System Chip Guide V01.05
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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System on a Chip Guide — 9S12UF32DGV1/D V01.05
120
Conditions are shown in Table A-4 unless otherwise noted, C
Num C
NOTES:
1. Affected by clock stretch: add N x t
10
11
12
13
14
15
16
17
18
29
20
21
22
23
24
25
26
27
28
29
1
2
3
4
5
6
7
8
9
P Frequency of operation (E-clock)
P Cycle time
D Pulse width, E low
D Pulse width, E high
D Address delay time
D Address valid time to E rise (PW
D Muxed address hold time
D Address hold to data valid
D Data hold to address
D Read data setup time
D Read data hold time
D Write data delay time
D Write data hold time
D Write data setup time
D Address access time
D E high access time
D Read/write delay time
D Read/write valid time to E rise (PW
D Read/write hold time
D Low strobe delay time
D Low strobe valid time to E rise (PW
D Low strobe hold time
D NOACC strobe delay time
D NOACC valid time to E rise (PW
D NOACC hold time
D IPIPO[1:0] delay time
D IPIPO[1:0] valid time to E rise (PW
D IPIPO[1:0] delay time
D IPIPO[1:0] valid time to E fall
Table A-15 Expanded Bus Timing Characteristics
(1)
1
(1)
(1)
(1)
(PW
Rating
(t
(PW
(PW
cyc
EH
cyc
–t
EH
EH
–t
AD
DSR
-t
where N=0,1,2 or 3, depending on the number of clock stretches.
–t
–t
EL
P1V
EL
DDW
DSR
)
–t
EL
–t
EL
EL
)
NOD
AD
–t
–t
)
–t
)
P0D
)
RWD
LSD
)
)
)
)
LOAD
Symbol
= 50pF
PW
PW
t
t
t
t
t
t
t
t
t
t
t
t
t
AHDS
t
t
ACCA
ACCE
t
t
t
t
t
t
t
t
DHW
MAH
DDW
DSW
RWD
RWV
RWH
NOD
NOH
t
t
DHA
DSR
DHR
NOV
t
LSD
LSV
LSH
P0D
P0V
P1D
P1V
cyc
AD
AV
f
o
EH
EL
Min
33
16
16
11
13
12
15
12
12
12
11
11
0
2
7
2
0
2
3
2
2
2
2
2
Typ
Freescale Semiconductor
Max
30.0
25
5
7
4
4
4
4
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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