mc56f801 Freescale Semiconductor, Inc, mc56f801 Datasheet - Page 110

• Manufacturer Part Number: mc56f801
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

10.15 Equivalent Circuit for ADC Inputs
Figure 10-17
at the same time that S3 is closed/open. When S1/S2 are closed & S3 is open, one input of the sample and
hold circuit moves to (V
switches are flipped, the charge on C1 and C2 are averaged via S3, with the result that a single-ended
analog input is switched to a differential voltage centered about (V
on every cycle of the ADC clock (open one-half ADC clock, closed one-half ADC clock). Note that there
are additional capacitances associated with the analog input pad, routing, etc., but these do not filter into
the S/H output voltage, as S1 provides isolation during the charge-sharing phase.
One aspect of this circuit is that there is an on-going input current, which is a function of the analog input
voltage, V
10.16 Power Consumption
See
which can be used to optimize power consumption for a given application.
Power consumption is given by the following equation:
110
Total power =
1.
2.
3.
4.
5.
Section 10.1
Analog Input
Parasitic capacitance due to package, pin-to-pin and pin-to-package base coupling; 1.8pF
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing; 2.04pF
Equivalent resistance for the channel select mux; 100 ohms
Sampling capacitor at the sample and hold circuit. Capacitor C1 is normally disconnected from the input and is only
connected to it at sampling time; 1.4pf
Equivalent input impedance, when the the input is selected =
REF
illustrates the ADC input circuit during sample and hold. S1 and S2 are always open/closed
and the ADC clock frequency.
1
+D: external [dynamic component]
+B: internal [state-dependent component]
+C: internal [dynamic component]
for a list of IDD requirements for the 56F8014. This section provides additional detail
+E: external [static]
A: internal [static component]
Figure 10-17 Equivalent Circuit for A/D Loading
REFH
2
-V
REFL
)/2, while the other charges to the analog input voltage. When the
56F8014 Technical Data, Rev. 9
125Ω ESD Resistor
(V
REFH
3
- V
REFL )
(ADC Clock Rate) x 1.4 x 10
/ 2
8pF noise damping capacitor
S1
S2
1
REFH
4
S3
-V
-12
REFL
C1
C2
)/2. The switches switch
S/H
Freescale Semiconductor
C1 = C2 = 1pF
Preliminary