cop87l88rb National Semiconductor Corporation, cop87l88rb Datasheet - Page 17

• Manufacturer Part Number: cop87l88rb
• Description: 8-bit Cmos Otp Microcontrollers With 16k Or 32k Memory, Can Interface, 8-bit A/d, And Usart
• Manufacturer: National Semiconductor Corporation

Multi-Input Wakeup
nation of Port L bits) will cause the device to exit the HALT or
IDLE modes. The selection is done through the Reg: WKEN.
The Reg: WKEN is an 8-bit read/write register, which con-
tains a control bit for every Port L bit. Setting a particular
WKEN bit enables a Wakeup from the associated Port L pin.
The user can select whether the trigger condition on the se-
lected Port L pin is going to be either a positive edge (low to
high transition) or a negative edge (high to low transition).
This selection is made via the Reg: WKEDG, which is an
8-bit control register with a bit assigned to each Port L pin.
Setting the control bit will select the trigger condition to be a
negative edge on that particular Port L pin. Resetting the bit
selects the trigger condition to be a positive edge. Changing
an edge select entails several steps in order to avoid a
pseudo Wakeup condition as a result of the edge change.
First, the associated WKEN bit should be reset, followed by
the edge select change in WKEDG. Next, the associated
WKPND bit should be cleared, followed by the associated
WKEN bit being re-enabled.
This same procedure should be used following reset, since
the Port L inputs are left floating as a result of reset. The oc-
currence of the selected trigger condition for Multi-Input
Wakeup is latched to a pending register called WKPND. The
respective bits of the WKPND register will be set on the oc-
currence of the selected trigger edge on the corresponding
Port L and Port M pin. The user has the responsibility of
clearing these pending flags. Since WKPND is a pending
register for the occurrence of selected wakeup conditions,
the device will not enter the HALT mode if any wakeup bit is
both enabled and pending. Consequently, the user has the
responsibility of clearing the pending flags before attempting
to enter the HALT mode.
(Continued)
FIGURE 12. Port M Multi-Input Wake-up Logic
17
An example may serve to clarify this procedure. Suppose we
wish to change the edge select from positive (low going high)
to negative (high going low) for Port L bit 5, where bit 5 has
previously been enabled for an input interrupt. The program
would be as follows:
RBIT
SBIT
RBIT
SBIT
If the Port L bits have been used as outputs and then
changed to inputs with Multi-Input Wakeup/Interrupt, a safety
procedure should also be followed to avoid inherited pseudo
wakeup conditions. After the selected Port L bits have been
changed from output to input but before the associated
WKEN bits are enabled, the associated edge select bits in
WKEDG should be set or reset for the desired edge selects,
followed by the assoicated WKPND bits being cleared.
The WKEN, WKPND and WKEDG are all read/write regis-
ters, and are cleared at reset.
PORT L INTERRUPTS
Port L provides the user with additional eight fully selectable,
edge sensitive interrupts which are all vectored into the
same service subroutine.
The interrupt from Port L shares logic with the wake up cir-
cuitry. The register WKEN allows interrupts from Port L to be
individually enabled or disabled. The register WKEDG speci-
fies the trigger condition to be either a positive or a negative
edge. Finally, the register WKPND latches in the pending
trigger conditions.
5,
5,
5,
5,
WKEN
WKEDG
WKPND
WKEN
;Disable MIWU
;Change edge polarity
;Reset pending flag
;Enable MIWU
DS100044-13
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