cop888ek National Semiconductor Corporation, cop888ek Datasheet - Page 10

• Manufacturer Part Number: cop888ek
• Description: 8-bit Cmos Rom Based Microcontrollers With 8k Memory, Comparator, And Single-slope A/d Capability
• Manufacturer: National Semiconductor Corporation

www.national.com
DC Supply Current for
Input Offset Voltage
Input Common Mode Voltage Range
(Note 26)
V
DC Supply Current for
Comparator (when enabled)
DC Supply Current for
V
Constant Current Source (when enabled)
Constant Current Source
Current Source Variation over
Common Mode Range
Current Source Enable Time
Instruction Cycle Time (t
Inputs
Output Propagation Delay (Note 23)
MICROWIRE Setup Time (t
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 24)
Reset Pulse Width
V
CC
CC
AC Electrical Characteristics 68xEK:
Note 18: t
Note 19: Maximum rate of voltage change must be
Note 20: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V
and outputs driven low but not connected to a load.
Note 21: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of I
sinking current; with L, C, G0, and G2–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to
V
in crystal clock mode.
Note 22: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
pins will not latch up. The voltage at the pins must be limited to
cludes ESD transients.
Note 23: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 24: Parameter characterized but not tested.
Analog Function Block AC and DC Characteristics
−55˚C
Crystal, Resonator
R/C Oscillator
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
CC
CC
SETUP
HOLD
PD1
/2 Reference
/2 Reference (when enabled)
; clock monitor and comparator disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT
= 5.0V, −40˚C
, t
PD0
c
T
= Instruction Cycle Time
A
+125˚C unless otherwise specified
Parameter
>
V
Parameter
CC
(the pins do not have source current when biased at a voltage below V
T
A
c
)
UWH
UWS
+85˚C
) (Note 23)
) (Note 23)
UPD
<
0.5 V/ms.
0.4V
4.0V
V
V
V
4.0V
4.0V
Temp = Constant
)
CC
CC
CC
= 6.0V
= 6.0V
= 6.0V
<
<
<
<
<
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning ex-
Conditions
4.5V
4.5V
4.5V
4.5V
R
4.5V
4.5V
V
V
V
V
V
V
V
CC
CC
CC
L
IN
CC
CC
CC
= 2.2k, C
<
<
<
<
4.5V
4.5V
4.5V
V
V
V
V
V
V
V
6.0V
6.0V
6.0V
CC
Conditions
CC
CC
CC
CC
CC
CC
10
− 1.5V
<
L
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
= 100 pF
0.5 V
CC
). The effective resistance to V
CC
Min
0.4
10
− 0.04
>
Min
200
1.0
3.0
1.0
1.0
1.0
1.0
1.0
60
20
56
V
CC
DD
and the pins will have sink current to V
HALT is done with device neither sourcing nor
0.5 V
Typ
±
1.5
50
20
10
Typ
CC
CC
is 750
0.5 V
V
Max
220
DC
DC
0.7
1.0
CC
Max
CC
±
250
200
(typical). These two
±
80
40
2
25
− 1.5
2
+ 0.04
CC
Units
µs
µs
ns
ns
µs
µs
ns
ns
ns
µs
t
t
t
t
when
Units
c
c
c
c
mV
CC
µA
µA
µA
µA
µA
µs
V
V