cop8cfe9 National Semiconductor Corporation, cop8cfe9 Datasheet - Page 19

• Manufacturer Part Number: cop8cfe9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, And 10-bit A/d
• Manufacturer: National Semiconductor Corporation

4.0 Functional Description
4.9 CONTROL REGISTERS
CNTRL Register (Address X'00EE)
The Timer1 (T1) and MICROWIRE/PLUS control register
contains the following bits:
PSW Register (Address X'00EF)
The PSW register contains the following select bits:
The Half-Carry flag is also affected by all the instructions that
affect the Carry flag. The SC (Set Carry) and R/C (Reset
Carry) instructions will respectively set or clear both the carry
flags. In addition to the SC and R/C instructions, ADC,
SUBC, RRC and RLC instructions affect the Carry and Half
Carry flags.
ICNTRL Register (Address X'00E8)
The ICNTRL register contains the following bits:
Bit 7
Bit 7
Unused
T1C3
Bit 7
T1C3
T1C2
T1C1
T1C0
MSEL
IEDG
SL1 & SL0 Select the MICROWIRE/PLUS clock divide
HC
C
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA
T1ENA
EXPND
BUSY
EXEN
GIE
LPEN
T0PND
T0EN
µWPND MICROWIRE/PLUS interrupt pending
µWEN
T1PNDB Timer T1 Interrupt Pending Flag for T1B capture
T1ENB
HC
T1C2
C
LPEN
Half Carry Flag
Carry Flag
in mode 1, T1 Underflow in Mode 2, T1A capture
edge in mode 3)
Timer T1 Interrupt Enable for Timer Underflow
or T1A Input capture edge
External interrupt pending
MICROWIRE/PLUS busy shifting flag
Enable external interrupt
Global interrupt enable (enables interrupts)
L
Wake-up/Interrupt)
Timer T0 Interrupt pending
Timer T0 Interrupt Enable (Bit 12 toggle)
Enable MICROWIRE/PLUS interrupt
edge
Timer T1 Interrupt Enable for T1B Input capture
edge
T1PNDA
Timer T1 mode control bit
Timer T1 mode control bit
Timer T1 mode control bit
Timer
modes 1 and 2. T1 Underflow Interrupt
Pending Flag in timer mode 3
Selects G5 and G4 as MICROWIRE/PLUS
signals SK and SO respectively
External
(0 = Rising edge, 1 = Falling edge)
by (00 = 2, 01 = 4, 1x = 8)
T1C1
T0PND
Port
T1ENA
T1C0
T1
T0EN
Interrupt
interrupt
Start/Stop
µWPND
MSEL
EXPND
edge
µWEN
Enable
IEDG
BUSY
control
polarity
T1PNDB
(Continued)
SL1
EXEN
(Multi-Input
in
T1ENB
select
SL0
timer
Bit 0
GIE
Bit 0
Bit 0
19
T2CNTRL Register (Address X'00C6)
The T2CNTRL register contains the following bits:
HSTCR Register (Address X'00AF)
The HSTCR register contains the following bits:
ITMR Register (Address X'00CF)
The ITMR register contains the following bits:
ENAD Register (Address X'00CB)
The ENAD register contains the following bits:
Bit 7
Bit 7
Bit 7
ADCH3 ADCH2
Bit 7
RSVD
T2C3
T2C3
T2C2
T2C1
T2C0
T2PNDA Timer T2 Interrupt Pending Flag (Autoreload
T2ENA
T2PNDB Timer T2 Interrupt Pendinfor T2B capture edge
T2ENB
T2HS Places Timer T2 in High Speed Mode.
RSVD
RSVD1 This bit is reserved and must be 1.
ITSEL2 Idle Timer period select bit.
ITSEL1 Idle Timer period select bit.
ITSEL0 Idle Timer period select bit.
ADCH3 ADC channel select bit
ADCH2 ADC channel select bit
ADCH1 ADC channel select bit
ADCH0 ADC channel select bit
ADMOD Places the ADC in single-ended or differential
MUX
PSC
ADBSY Signifies that the ADC is currently busy perform-
RSVD1
T2C2
Channel Select
These bits are reserved and must be 0.
mode.
Enables the ADC multiplexor output.
Switches the ADC clock between a divide by one
or a divide by sixteen of MCLK.
ing a conversion. When set by the user, starts a
conversion.
Timer T2 mode control bit
Timer T2 mode control bit
Timer T2 mode control bit
Timer
modes 1 and 2, Timer T2 Underflow Interrupt
Pending Flag in timer mode 3
RA in mode 1, T2 Underflow in mode 2, T2A
capture edge in mode 3)
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
Timer T2 Interrupt Enable for T2B Input capture
edge
ADCH1
RSVD
T2C1
T2
ADCH0
RSVD
T2C0
Reserved
Start/Stop
ADMOD
T2PNDA
RSVD
Select
Mode
Mux Out Prescale
T2ENA
ITSEL2
MUX
control
T2PNDB
ITSEL1
PSC
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in
T2ENB
ADBSY
ITSEL0
T2HS
Busy
timer
Bit 0
Bit 0
Bit 0
Bit 0