r5f3650kcnfb Renesas Electronics Corporation., r5f3650kcnfb Datasheet - Page 25

• Manufacturer Part Number: r5f3650kcnfb
• Description: M16c/65c Group Renesas Mcu
• Manufacturer: Renesas Electronics Corporation.

M16C/65C Group
R01DS0015EJ0100 Rev.1.00
Feb 07, 2011
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.8.1
2.8.2
2.8.3
2.8.4
2.8.5
2.8.6
R0, R1, R2, and R3 are 16-bit registers used for transfer, arithmetic, and logic operations. R0 and R1 can
be split into upper (R0H/R1H) and lower (R0L/R1L) bits to be used separately as 8-bit data registers.
R0 can be combined with R2, and R3 can be combined with R1 and be used as 32-bit data registers
R2R0 and R3R1, respectively.
A0 and A1 are 16-bit registers used for indirect addressing, relative addressing, transfer, arithmetic, and
logic operations. A0 can be combined with A1 and used as a 32-bit address register (A1A0).
FB is a 16-bit register that is used for FB relative addressing.
INTB is a 20-bit register that indicates the start address of a relocatable interrupt vector table.
The PC is 20 bits wide and indicates the address of the next instruction to be executed.
The USP and ISP stack pointers (SP) are each comprised of 16 bits. The U flag is used to switch between
USP and ISP.
SB is a 16-bit register used for SB relative addressing.
FLG is an 11-bit register that indicates the CPU state.
The C flag retains a carry, borrow, or shift-out bit generated by the arithmetic/logic unit.
The D flag is for debugging only. Set it to 0.
The Z flag becomes 1 when an arithmetic operation results in 0. Otherwise, it becomes 0.
The S flag becomes 1 when an arithmetic operation results in a negative value. Otherwise, it becomes
0.
Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is 1.
The O flag becomes 1 when an arithmetic operation results in an overflow. Otherwise, it becomes 0.
Data Registers (R0, R1, R2, and R3)
Address Registers (A0 and A1)
Frame Base Register (FB)
Interrupt Table Register (INTB)
Program Counter (PC)
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
Static Base Register (SB)
Flag Register (FLG)
Carry Flag (C Flag)
Debug Flag (D Flag)
Zero Flag (Z Flag)
Sign Flag (S Flag)
Register Bank Select Flag (B Flag)
Overflow Flag (O Flag)
2. Central Processing Unit (CPU)
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